18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#include <linux/platform_data/usb-omap.h> 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ci/* AM35x */ 58c2ecf20Sopenharmony_ci/* USB 2.0 PHY Control */ 68c2ecf20Sopenharmony_ci#define CONF2_PHY_GPIOMODE (1 << 23) 78c2ecf20Sopenharmony_ci#define CONF2_OTGMODE (3 << 14) 88c2ecf20Sopenharmony_ci#define CONF2_NO_OVERRIDE (0 << 14) 98c2ecf20Sopenharmony_ci#define CONF2_FORCE_HOST (1 << 14) 108c2ecf20Sopenharmony_ci#define CONF2_FORCE_DEVICE (2 << 14) 118c2ecf20Sopenharmony_ci#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14) 128c2ecf20Sopenharmony_ci#define CONF2_SESENDEN (1 << 13) 138c2ecf20Sopenharmony_ci#define CONF2_VBDTCTEN (1 << 12) 148c2ecf20Sopenharmony_ci#define CONF2_REFFREQ_24MHZ (2 << 8) 158c2ecf20Sopenharmony_ci#define CONF2_REFFREQ_26MHZ (7 << 8) 168c2ecf20Sopenharmony_ci#define CONF2_REFFREQ_13MHZ (6 << 8) 178c2ecf20Sopenharmony_ci#define CONF2_REFFREQ (0xf << 8) 188c2ecf20Sopenharmony_ci#define CONF2_PHYCLKGD (1 << 7) 198c2ecf20Sopenharmony_ci#define CONF2_VBUSSENSE (1 << 6) 208c2ecf20Sopenharmony_ci#define CONF2_PHY_PLLON (1 << 5) 218c2ecf20Sopenharmony_ci#define CONF2_RESET (1 << 4) 228c2ecf20Sopenharmony_ci#define CONF2_PHYPWRDN (1 << 3) 238c2ecf20Sopenharmony_ci#define CONF2_OTGPWRDN (1 << 2) 248c2ecf20Sopenharmony_ci#define CONF2_DATPOL (1 << 1) 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci/* TI81XX specific definitions */ 278c2ecf20Sopenharmony_ci#define USBCTRL0 0x620 288c2ecf20Sopenharmony_ci#define USBSTAT0 0x624 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci/* TI816X PHY controls bits */ 318c2ecf20Sopenharmony_ci#define TI816X_USBPHY0_NORMAL_MODE (1 << 0) 328c2ecf20Sopenharmony_ci#define TI816X_USBPHY_REFCLK_OSC (1 << 8) 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci/* TI814X PHY controls bits */ 358c2ecf20Sopenharmony_ci#define USBPHY_CM_PWRDN (1 << 0) 368c2ecf20Sopenharmony_ci#define USBPHY_OTG_PWRDN (1 << 1) 378c2ecf20Sopenharmony_ci#define USBPHY_CHGDET_DIS (1 << 2) 388c2ecf20Sopenharmony_ci#define USBPHY_CHGDET_RSTRT (1 << 3) 398c2ecf20Sopenharmony_ci#define USBPHY_SRCONDM (1 << 4) 408c2ecf20Sopenharmony_ci#define USBPHY_SINKONDP (1 << 5) 418c2ecf20Sopenharmony_ci#define USBPHY_CHGISINK_EN (1 << 6) 428c2ecf20Sopenharmony_ci#define USBPHY_CHGVSRC_EN (1 << 7) 438c2ecf20Sopenharmony_ci#define USBPHY_DMPULLUP (1 << 8) 448c2ecf20Sopenharmony_ci#define USBPHY_DPPULLUP (1 << 9) 458c2ecf20Sopenharmony_ci#define USBPHY_CDET_EXTCTL (1 << 10) 468c2ecf20Sopenharmony_ci#define USBPHY_GPIO_MODE (1 << 12) 478c2ecf20Sopenharmony_ci#define USBPHY_DPOPBUFCTL (1 << 13) 488c2ecf20Sopenharmony_ci#define USBPHY_DMOPBUFCTL (1 << 14) 498c2ecf20Sopenharmony_ci#define USBPHY_DPINPUT (1 << 15) 508c2ecf20Sopenharmony_ci#define USBPHY_DMINPUT (1 << 16) 518c2ecf20Sopenharmony_ci#define USBPHY_DPGPIO_PD (1 << 17) 528c2ecf20Sopenharmony_ci#define USBPHY_DMGPIO_PD (1 << 18) 538c2ecf20Sopenharmony_ci#define USBPHY_OTGVDET_EN (1 << 19) 548c2ecf20Sopenharmony_ci#define USBPHY_OTGSESSEND_EN (1 << 20) 558c2ecf20Sopenharmony_ci#define USBPHY_DATA_POLARITY (1 << 23) 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_cistruct usbhs_phy_data { 588c2ecf20Sopenharmony_ci int port; /* 1 indexed port number */ 598c2ecf20Sopenharmony_ci int reset_gpio; 608c2ecf20Sopenharmony_ci int vcc_gpio; 618c2ecf20Sopenharmony_ci bool vcc_polarity; /* 1 active high, 0 active low */ 628c2ecf20Sopenharmony_ci}; 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ciextern void usb_musb_init(struct omap_musb_board_data *board_data); 658c2ecf20Sopenharmony_ciextern void usbhs_init(struct usbhs_omap_platform_data *pdata); 668c2ecf20Sopenharmony_ciextern int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys); 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ciextern void am35x_musb_reset(void); 698c2ecf20Sopenharmony_ciextern void am35x_musb_phy_power(u8 on); 708c2ecf20Sopenharmony_ciextern void am35x_musb_clear_irq(void); 718c2ecf20Sopenharmony_ciextern void am35x_set_mode(u8 musb_mode); 72