18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci#include <linux/kernel.h>
38c2ecf20Sopenharmony_ci#include <linux/init.h>
48c2ecf20Sopenharmony_ci#include <linux/reboot.h>
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include "iomap.h"
78c2ecf20Sopenharmony_ci#include "common.h"
88c2ecf20Sopenharmony_ci#include "control.h"
98c2ecf20Sopenharmony_ci#include "prm3xxx.h"
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#define TI81XX_PRM_DEVICE_RSTCTRL	0x00a0
128c2ecf20Sopenharmony_ci#define TI81XX_GLOBAL_RST_COLD		BIT(1)
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci/**
158c2ecf20Sopenharmony_ci * ti81xx_restart - trigger a software restart of the SoC
168c2ecf20Sopenharmony_ci * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
178c2ecf20Sopenharmony_ci * @cmd: passed from the userspace program rebooting the system (if provided)
188c2ecf20Sopenharmony_ci *
198c2ecf20Sopenharmony_ci * Resets the SoC.  For @cmd, see the 'reboot' syscall in
208c2ecf20Sopenharmony_ci * kernel/sys.c.  No return value.
218c2ecf20Sopenharmony_ci *
228c2ecf20Sopenharmony_ci * NOTE: Warm reset does not seem to work, may require resetting
238c2ecf20Sopenharmony_ci * clocks to bypass mode.
248c2ecf20Sopenharmony_ci */
258c2ecf20Sopenharmony_civoid ti81xx_restart(enum reboot_mode mode, const char *cmd)
268c2ecf20Sopenharmony_ci{
278c2ecf20Sopenharmony_ci	omap2_prm_set_mod_reg_bits(TI81XX_GLOBAL_RST_COLD, 0,
288c2ecf20Sopenharmony_ci				   TI81XX_PRM_DEVICE_RSTCTRL);
298c2ecf20Sopenharmony_ci	while (1);
308c2ecf20Sopenharmony_ci}
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