18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * linux/arch/arm/mach-omap2/board-n8x0.c 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2005-2009 Nokia Corporation 68c2ecf20Sopenharmony_ci * Author: Juha Yrjola <juha.yrjola@nokia.com> 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Modified from mach-omap2/board-generic.c 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <linux/clk.h> 128c2ecf20Sopenharmony_ci#include <linux/delay.h> 138c2ecf20Sopenharmony_ci#include <linux/gpio.h> 148c2ecf20Sopenharmony_ci#include <linux/init.h> 158c2ecf20Sopenharmony_ci#include <linux/io.h> 168c2ecf20Sopenharmony_ci#include <linux/irq.h> 178c2ecf20Sopenharmony_ci#include <linux/stddef.h> 188c2ecf20Sopenharmony_ci#include <linux/i2c.h> 198c2ecf20Sopenharmony_ci#include <linux/spi/spi.h> 208c2ecf20Sopenharmony_ci#include <linux/usb/musb.h> 218c2ecf20Sopenharmony_ci#include <linux/mmc/host.h> 228c2ecf20Sopenharmony_ci#include <linux/platform_data/spi-omap2-mcspi.h> 238c2ecf20Sopenharmony_ci#include <linux/platform_data/mmc-omap.h> 248c2ecf20Sopenharmony_ci#include <linux/mfd/menelaus.h> 258c2ecf20Sopenharmony_ci#include <sound/tlv320aic3x.h> 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#include <asm/mach/arch.h> 288c2ecf20Sopenharmony_ci#include <asm/mach-types.h> 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#include "common.h" 318c2ecf20Sopenharmony_ci#include "mmc.h" 328c2ecf20Sopenharmony_ci#include "soc.h" 338c2ecf20Sopenharmony_ci#include "common-board-devices.h" 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#define TUSB6010_ASYNC_CS 1 368c2ecf20Sopenharmony_ci#define TUSB6010_SYNC_CS 4 378c2ecf20Sopenharmony_ci#define TUSB6010_GPIO_INT 58 388c2ecf20Sopenharmony_ci#define TUSB6010_GPIO_ENABLE 0 398c2ecf20Sopenharmony_ci#define TUSB6010_DMACHAN 0x3f 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci#define NOKIA_N810_WIMAX (1 << 2) 428c2ecf20Sopenharmony_ci#define NOKIA_N810 (1 << 1) 438c2ecf20Sopenharmony_ci#define NOKIA_N800 (1 << 0) 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_cistatic u32 board_caps; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci#define board_is_n800() (board_caps & NOKIA_N800) 488c2ecf20Sopenharmony_ci#define board_is_n810() (board_caps & NOKIA_N810) 498c2ecf20Sopenharmony_ci#define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX) 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_cistatic void board_check_revision(void) 528c2ecf20Sopenharmony_ci{ 538c2ecf20Sopenharmony_ci if (of_machine_is_compatible("nokia,n800")) 548c2ecf20Sopenharmony_ci board_caps = NOKIA_N800; 558c2ecf20Sopenharmony_ci else if (of_machine_is_compatible("nokia,n810")) 568c2ecf20Sopenharmony_ci board_caps = NOKIA_N810; 578c2ecf20Sopenharmony_ci else if (of_machine_is_compatible("nokia,n810-wimax")) 588c2ecf20Sopenharmony_ci board_caps = NOKIA_N810_WIMAX; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci if (!board_caps) 618c2ecf20Sopenharmony_ci pr_err("Unknown board\n"); 628c2ecf20Sopenharmony_ci} 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) 658c2ecf20Sopenharmony_ci/* 668c2ecf20Sopenharmony_ci * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and 678c2ecf20Sopenharmony_ci * 1.5 V voltage regulators of PM companion chip. Companion chip will then 688c2ecf20Sopenharmony_ci * provide then PGOOD signal to TUSB6010 which will release it from reset. 698c2ecf20Sopenharmony_ci */ 708c2ecf20Sopenharmony_cistatic int tusb_set_power(int state) 718c2ecf20Sopenharmony_ci{ 728c2ecf20Sopenharmony_ci int i, retval = 0; 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci if (state) { 758c2ecf20Sopenharmony_ci gpio_set_value(TUSB6010_GPIO_ENABLE, 1); 768c2ecf20Sopenharmony_ci msleep(1); 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci /* Wait until TUSB6010 pulls INT pin down */ 798c2ecf20Sopenharmony_ci i = 100; 808c2ecf20Sopenharmony_ci while (i && gpio_get_value(TUSB6010_GPIO_INT)) { 818c2ecf20Sopenharmony_ci msleep(1); 828c2ecf20Sopenharmony_ci i--; 838c2ecf20Sopenharmony_ci } 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci if (!i) { 868c2ecf20Sopenharmony_ci printk(KERN_ERR "tusb: powerup failed\n"); 878c2ecf20Sopenharmony_ci retval = -ENODEV; 888c2ecf20Sopenharmony_ci } 898c2ecf20Sopenharmony_ci } else { 908c2ecf20Sopenharmony_ci gpio_set_value(TUSB6010_GPIO_ENABLE, 0); 918c2ecf20Sopenharmony_ci msleep(10); 928c2ecf20Sopenharmony_ci } 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ci return retval; 958c2ecf20Sopenharmony_ci} 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_cistatic struct musb_hdrc_config musb_config = { 988c2ecf20Sopenharmony_ci .multipoint = 1, 998c2ecf20Sopenharmony_ci .dyn_fifo = 1, 1008c2ecf20Sopenharmony_ci .num_eps = 16, 1018c2ecf20Sopenharmony_ci .ram_bits = 12, 1028c2ecf20Sopenharmony_ci}; 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_cistatic struct musb_hdrc_platform_data tusb_data = { 1058c2ecf20Sopenharmony_ci .mode = MUSB_OTG, 1068c2ecf20Sopenharmony_ci .set_power = tusb_set_power, 1078c2ecf20Sopenharmony_ci .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */ 1088c2ecf20Sopenharmony_ci .power = 100, /* Max 100 mA VBUS for host mode */ 1098c2ecf20Sopenharmony_ci .config = &musb_config, 1108c2ecf20Sopenharmony_ci}; 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_cistatic void __init n8x0_usb_init(void) 1138c2ecf20Sopenharmony_ci{ 1148c2ecf20Sopenharmony_ci int ret = 0; 1158c2ecf20Sopenharmony_ci static const char announce[] __initconst = KERN_INFO "TUSB 6010\n"; 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci /* PM companion chip power control pin */ 1188c2ecf20Sopenharmony_ci ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW, 1198c2ecf20Sopenharmony_ci "TUSB6010 enable"); 1208c2ecf20Sopenharmony_ci if (ret != 0) { 1218c2ecf20Sopenharmony_ci printk(KERN_ERR "Could not get TUSB power GPIO%i\n", 1228c2ecf20Sopenharmony_ci TUSB6010_GPIO_ENABLE); 1238c2ecf20Sopenharmony_ci return; 1248c2ecf20Sopenharmony_ci } 1258c2ecf20Sopenharmony_ci tusb_set_power(0); 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, 1288c2ecf20Sopenharmony_ci TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, 1298c2ecf20Sopenharmony_ci TUSB6010_GPIO_INT, TUSB6010_DMACHAN); 1308c2ecf20Sopenharmony_ci if (ret != 0) 1318c2ecf20Sopenharmony_ci goto err; 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci printk(announce); 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_ci return; 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_cierr: 1388c2ecf20Sopenharmony_ci gpio_free(TUSB6010_GPIO_ENABLE); 1398c2ecf20Sopenharmony_ci} 1408c2ecf20Sopenharmony_ci#else 1418c2ecf20Sopenharmony_ci 1428c2ecf20Sopenharmony_cistatic void __init n8x0_usb_init(void) {} 1438c2ecf20Sopenharmony_ci 1448c2ecf20Sopenharmony_ci#endif /*CONFIG_USB_MUSB_TUSB6010 */ 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_cistatic struct omap2_mcspi_device_config p54spi_mcspi_config = { 1488c2ecf20Sopenharmony_ci .turbo_mode = 0, 1498c2ecf20Sopenharmony_ci}; 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_cistatic struct spi_board_info n800_spi_board_info[] __initdata = { 1528c2ecf20Sopenharmony_ci { 1538c2ecf20Sopenharmony_ci .modalias = "p54spi", 1548c2ecf20Sopenharmony_ci .bus_num = 2, 1558c2ecf20Sopenharmony_ci .chip_select = 0, 1568c2ecf20Sopenharmony_ci .max_speed_hz = 48000000, 1578c2ecf20Sopenharmony_ci .controller_data = &p54spi_mcspi_config, 1588c2ecf20Sopenharmony_ci }, 1598c2ecf20Sopenharmony_ci}; 1608c2ecf20Sopenharmony_ci 1618c2ecf20Sopenharmony_ci#if defined(CONFIG_MENELAUS) && IS_ENABLED(CONFIG_MMC_OMAP) 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_ci/* 1648c2ecf20Sopenharmony_ci * On both N800 and N810, only the first of the two MMC controllers is in use. 1658c2ecf20Sopenharmony_ci * The two MMC slots are multiplexed via Menelaus companion chip over I2C. 1668c2ecf20Sopenharmony_ci * On N800, both slots are powered via Menelaus. On N810, only one of the 1678c2ecf20Sopenharmony_ci * slots is powered via Menelaus. The N810 EMMC is powered via GPIO. 1688c2ecf20Sopenharmony_ci * 1698c2ecf20Sopenharmony_ci * VMMC slot 1 on both N800 and N810 1708c2ecf20Sopenharmony_ci * VDCDC3_APE and VMCS2_APE slot 2 on N800 1718c2ecf20Sopenharmony_ci * GPIO23 and GPIO9 slot 2 EMMC on N810 1728c2ecf20Sopenharmony_ci * 1738c2ecf20Sopenharmony_ci */ 1748c2ecf20Sopenharmony_ci#define N8X0_SLOT_SWITCH_GPIO 96 1758c2ecf20Sopenharmony_ci#define N810_EMMC_VSD_GPIO 23 1768c2ecf20Sopenharmony_ci#define N810_EMMC_VIO_GPIO 9 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_cistatic int slot1_cover_open; 1798c2ecf20Sopenharmony_cistatic int slot2_cover_open; 1808c2ecf20Sopenharmony_cistatic struct device *mmc_device; 1818c2ecf20Sopenharmony_ci 1828c2ecf20Sopenharmony_cistatic int n8x0_mmc_switch_slot(struct device *dev, int slot) 1838c2ecf20Sopenharmony_ci{ 1848c2ecf20Sopenharmony_ci#ifdef CONFIG_MMC_DEBUG 1858c2ecf20Sopenharmony_ci dev_dbg(dev, "Choose slot %d\n", slot + 1); 1868c2ecf20Sopenharmony_ci#endif 1878c2ecf20Sopenharmony_ci gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); 1888c2ecf20Sopenharmony_ci return 0; 1898c2ecf20Sopenharmony_ci} 1908c2ecf20Sopenharmony_ci 1918c2ecf20Sopenharmony_cistatic int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, 1928c2ecf20Sopenharmony_ci int power_on, int vdd) 1938c2ecf20Sopenharmony_ci{ 1948c2ecf20Sopenharmony_ci int mV; 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_ci#ifdef CONFIG_MMC_DEBUG 1978c2ecf20Sopenharmony_ci dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, 1988c2ecf20Sopenharmony_ci power_on ? "on" : "off", vdd); 1998c2ecf20Sopenharmony_ci#endif 2008c2ecf20Sopenharmony_ci if (slot == 0) { 2018c2ecf20Sopenharmony_ci if (!power_on) 2028c2ecf20Sopenharmony_ci return menelaus_set_vmmc(0); 2038c2ecf20Sopenharmony_ci switch (1 << vdd) { 2048c2ecf20Sopenharmony_ci case MMC_VDD_33_34: 2058c2ecf20Sopenharmony_ci case MMC_VDD_32_33: 2068c2ecf20Sopenharmony_ci case MMC_VDD_31_32: 2078c2ecf20Sopenharmony_ci mV = 3100; 2088c2ecf20Sopenharmony_ci break; 2098c2ecf20Sopenharmony_ci case MMC_VDD_30_31: 2108c2ecf20Sopenharmony_ci mV = 3000; 2118c2ecf20Sopenharmony_ci break; 2128c2ecf20Sopenharmony_ci case MMC_VDD_28_29: 2138c2ecf20Sopenharmony_ci mV = 2800; 2148c2ecf20Sopenharmony_ci break; 2158c2ecf20Sopenharmony_ci case MMC_VDD_165_195: 2168c2ecf20Sopenharmony_ci mV = 1850; 2178c2ecf20Sopenharmony_ci break; 2188c2ecf20Sopenharmony_ci default: 2198c2ecf20Sopenharmony_ci BUG(); 2208c2ecf20Sopenharmony_ci } 2218c2ecf20Sopenharmony_ci return menelaus_set_vmmc(mV); 2228c2ecf20Sopenharmony_ci } else { 2238c2ecf20Sopenharmony_ci if (!power_on) 2248c2ecf20Sopenharmony_ci return menelaus_set_vdcdc(3, 0); 2258c2ecf20Sopenharmony_ci switch (1 << vdd) { 2268c2ecf20Sopenharmony_ci case MMC_VDD_33_34: 2278c2ecf20Sopenharmony_ci case MMC_VDD_32_33: 2288c2ecf20Sopenharmony_ci mV = 3300; 2298c2ecf20Sopenharmony_ci break; 2308c2ecf20Sopenharmony_ci case MMC_VDD_30_31: 2318c2ecf20Sopenharmony_ci case MMC_VDD_29_30: 2328c2ecf20Sopenharmony_ci mV = 3000; 2338c2ecf20Sopenharmony_ci break; 2348c2ecf20Sopenharmony_ci case MMC_VDD_28_29: 2358c2ecf20Sopenharmony_ci case MMC_VDD_27_28: 2368c2ecf20Sopenharmony_ci mV = 2800; 2378c2ecf20Sopenharmony_ci break; 2388c2ecf20Sopenharmony_ci case MMC_VDD_24_25: 2398c2ecf20Sopenharmony_ci case MMC_VDD_23_24: 2408c2ecf20Sopenharmony_ci mV = 2400; 2418c2ecf20Sopenharmony_ci break; 2428c2ecf20Sopenharmony_ci case MMC_VDD_22_23: 2438c2ecf20Sopenharmony_ci case MMC_VDD_21_22: 2448c2ecf20Sopenharmony_ci mV = 2200; 2458c2ecf20Sopenharmony_ci break; 2468c2ecf20Sopenharmony_ci case MMC_VDD_20_21: 2478c2ecf20Sopenharmony_ci mV = 2000; 2488c2ecf20Sopenharmony_ci break; 2498c2ecf20Sopenharmony_ci case MMC_VDD_165_195: 2508c2ecf20Sopenharmony_ci mV = 1800; 2518c2ecf20Sopenharmony_ci break; 2528c2ecf20Sopenharmony_ci default: 2538c2ecf20Sopenharmony_ci BUG(); 2548c2ecf20Sopenharmony_ci } 2558c2ecf20Sopenharmony_ci return menelaus_set_vdcdc(3, mV); 2568c2ecf20Sopenharmony_ci } 2578c2ecf20Sopenharmony_ci return 0; 2588c2ecf20Sopenharmony_ci} 2598c2ecf20Sopenharmony_ci 2608c2ecf20Sopenharmony_cistatic void n810_set_power_emmc(struct device *dev, 2618c2ecf20Sopenharmony_ci int power_on) 2628c2ecf20Sopenharmony_ci{ 2638c2ecf20Sopenharmony_ci dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off"); 2648c2ecf20Sopenharmony_ci 2658c2ecf20Sopenharmony_ci if (power_on) { 2668c2ecf20Sopenharmony_ci gpio_set_value(N810_EMMC_VSD_GPIO, 1); 2678c2ecf20Sopenharmony_ci msleep(1); 2688c2ecf20Sopenharmony_ci gpio_set_value(N810_EMMC_VIO_GPIO, 1); 2698c2ecf20Sopenharmony_ci msleep(1); 2708c2ecf20Sopenharmony_ci } else { 2718c2ecf20Sopenharmony_ci gpio_set_value(N810_EMMC_VIO_GPIO, 0); 2728c2ecf20Sopenharmony_ci msleep(50); 2738c2ecf20Sopenharmony_ci gpio_set_value(N810_EMMC_VSD_GPIO, 0); 2748c2ecf20Sopenharmony_ci msleep(50); 2758c2ecf20Sopenharmony_ci } 2768c2ecf20Sopenharmony_ci} 2778c2ecf20Sopenharmony_ci 2788c2ecf20Sopenharmony_cistatic int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, 2798c2ecf20Sopenharmony_ci int vdd) 2808c2ecf20Sopenharmony_ci{ 2818c2ecf20Sopenharmony_ci if (board_is_n800() || slot == 0) 2828c2ecf20Sopenharmony_ci return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); 2838c2ecf20Sopenharmony_ci 2848c2ecf20Sopenharmony_ci n810_set_power_emmc(dev, power_on); 2858c2ecf20Sopenharmony_ci 2868c2ecf20Sopenharmony_ci return 0; 2878c2ecf20Sopenharmony_ci} 2888c2ecf20Sopenharmony_ci 2898c2ecf20Sopenharmony_cistatic int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) 2908c2ecf20Sopenharmony_ci{ 2918c2ecf20Sopenharmony_ci int r; 2928c2ecf20Sopenharmony_ci 2938c2ecf20Sopenharmony_ci dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1, 2948c2ecf20Sopenharmony_ci bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); 2958c2ecf20Sopenharmony_ci BUG_ON(slot != 0 && slot != 1); 2968c2ecf20Sopenharmony_ci slot++; 2978c2ecf20Sopenharmony_ci switch (bus_mode) { 2988c2ecf20Sopenharmony_ci case MMC_BUSMODE_OPENDRAIN: 2998c2ecf20Sopenharmony_ci r = menelaus_set_mmc_opendrain(slot, 1); 3008c2ecf20Sopenharmony_ci break; 3018c2ecf20Sopenharmony_ci case MMC_BUSMODE_PUSHPULL: 3028c2ecf20Sopenharmony_ci r = menelaus_set_mmc_opendrain(slot, 0); 3038c2ecf20Sopenharmony_ci break; 3048c2ecf20Sopenharmony_ci default: 3058c2ecf20Sopenharmony_ci BUG(); 3068c2ecf20Sopenharmony_ci } 3078c2ecf20Sopenharmony_ci if (r != 0 && printk_ratelimit()) 3088c2ecf20Sopenharmony_ci dev_err(dev, "MMC: unable to set bus mode for slot %d\n", 3098c2ecf20Sopenharmony_ci slot); 3108c2ecf20Sopenharmony_ci return r; 3118c2ecf20Sopenharmony_ci} 3128c2ecf20Sopenharmony_ci 3138c2ecf20Sopenharmony_cistatic int n8x0_mmc_get_cover_state(struct device *dev, int slot) 3148c2ecf20Sopenharmony_ci{ 3158c2ecf20Sopenharmony_ci slot++; 3168c2ecf20Sopenharmony_ci BUG_ON(slot != 1 && slot != 2); 3178c2ecf20Sopenharmony_ci if (slot == 1) 3188c2ecf20Sopenharmony_ci return slot1_cover_open; 3198c2ecf20Sopenharmony_ci else 3208c2ecf20Sopenharmony_ci return slot2_cover_open; 3218c2ecf20Sopenharmony_ci} 3228c2ecf20Sopenharmony_ci 3238c2ecf20Sopenharmony_cistatic void n8x0_mmc_callback(void *data, u8 card_mask) 3248c2ecf20Sopenharmony_ci{ 3258c2ecf20Sopenharmony_ci#ifdef CONFIG_MMC_OMAP 3268c2ecf20Sopenharmony_ci int bit, *openp, index; 3278c2ecf20Sopenharmony_ci 3288c2ecf20Sopenharmony_ci if (board_is_n800()) { 3298c2ecf20Sopenharmony_ci bit = 1 << 1; 3308c2ecf20Sopenharmony_ci openp = &slot2_cover_open; 3318c2ecf20Sopenharmony_ci index = 1; 3328c2ecf20Sopenharmony_ci } else { 3338c2ecf20Sopenharmony_ci bit = 1; 3348c2ecf20Sopenharmony_ci openp = &slot1_cover_open; 3358c2ecf20Sopenharmony_ci index = 0; 3368c2ecf20Sopenharmony_ci } 3378c2ecf20Sopenharmony_ci 3388c2ecf20Sopenharmony_ci if (card_mask & bit) 3398c2ecf20Sopenharmony_ci *openp = 1; 3408c2ecf20Sopenharmony_ci else 3418c2ecf20Sopenharmony_ci *openp = 0; 3428c2ecf20Sopenharmony_ci 3438c2ecf20Sopenharmony_ci omap_mmc_notify_cover_event(mmc_device, index, *openp); 3448c2ecf20Sopenharmony_ci#else 3458c2ecf20Sopenharmony_ci pr_warn("MMC: notify cover event not available\n"); 3468c2ecf20Sopenharmony_ci#endif 3478c2ecf20Sopenharmony_ci} 3488c2ecf20Sopenharmony_ci 3498c2ecf20Sopenharmony_cistatic int n8x0_mmc_late_init(struct device *dev) 3508c2ecf20Sopenharmony_ci{ 3518c2ecf20Sopenharmony_ci int r, bit, *openp; 3528c2ecf20Sopenharmony_ci int vs2sel; 3538c2ecf20Sopenharmony_ci 3548c2ecf20Sopenharmony_ci mmc_device = dev; 3558c2ecf20Sopenharmony_ci 3568c2ecf20Sopenharmony_ci r = menelaus_set_slot_sel(1); 3578c2ecf20Sopenharmony_ci if (r < 0) 3588c2ecf20Sopenharmony_ci return r; 3598c2ecf20Sopenharmony_ci 3608c2ecf20Sopenharmony_ci if (board_is_n800()) 3618c2ecf20Sopenharmony_ci vs2sel = 0; 3628c2ecf20Sopenharmony_ci else 3638c2ecf20Sopenharmony_ci vs2sel = 2; 3648c2ecf20Sopenharmony_ci 3658c2ecf20Sopenharmony_ci r = menelaus_set_mmc_slot(2, 0, vs2sel, 1); 3668c2ecf20Sopenharmony_ci if (r < 0) 3678c2ecf20Sopenharmony_ci return r; 3688c2ecf20Sopenharmony_ci 3698c2ecf20Sopenharmony_ci n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */ 3708c2ecf20Sopenharmony_ci n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16); 3718c2ecf20Sopenharmony_ci 3728c2ecf20Sopenharmony_ci r = menelaus_set_mmc_slot(1, 1, 0, 1); 3738c2ecf20Sopenharmony_ci if (r < 0) 3748c2ecf20Sopenharmony_ci return r; 3758c2ecf20Sopenharmony_ci r = menelaus_set_mmc_slot(2, 1, vs2sel, 1); 3768c2ecf20Sopenharmony_ci if (r < 0) 3778c2ecf20Sopenharmony_ci return r; 3788c2ecf20Sopenharmony_ci 3798c2ecf20Sopenharmony_ci r = menelaus_get_slot_pin_states(); 3808c2ecf20Sopenharmony_ci if (r < 0) 3818c2ecf20Sopenharmony_ci return r; 3828c2ecf20Sopenharmony_ci 3838c2ecf20Sopenharmony_ci if (board_is_n800()) { 3848c2ecf20Sopenharmony_ci bit = 1 << 1; 3858c2ecf20Sopenharmony_ci openp = &slot2_cover_open; 3868c2ecf20Sopenharmony_ci } else { 3878c2ecf20Sopenharmony_ci bit = 1; 3888c2ecf20Sopenharmony_ci openp = &slot1_cover_open; 3898c2ecf20Sopenharmony_ci slot2_cover_open = 0; 3908c2ecf20Sopenharmony_ci } 3918c2ecf20Sopenharmony_ci 3928c2ecf20Sopenharmony_ci /* All slot pin bits seem to be inversed until first switch change */ 3938c2ecf20Sopenharmony_ci if (r == 0xf || r == (0xf & ~bit)) 3948c2ecf20Sopenharmony_ci r = ~r; 3958c2ecf20Sopenharmony_ci 3968c2ecf20Sopenharmony_ci if (r & bit) 3978c2ecf20Sopenharmony_ci *openp = 1; 3988c2ecf20Sopenharmony_ci else 3998c2ecf20Sopenharmony_ci *openp = 0; 4008c2ecf20Sopenharmony_ci 4018c2ecf20Sopenharmony_ci r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL); 4028c2ecf20Sopenharmony_ci 4038c2ecf20Sopenharmony_ci return r; 4048c2ecf20Sopenharmony_ci} 4058c2ecf20Sopenharmony_ci 4068c2ecf20Sopenharmony_cistatic void n8x0_mmc_shutdown(struct device *dev) 4078c2ecf20Sopenharmony_ci{ 4088c2ecf20Sopenharmony_ci int vs2sel; 4098c2ecf20Sopenharmony_ci 4108c2ecf20Sopenharmony_ci if (board_is_n800()) 4118c2ecf20Sopenharmony_ci vs2sel = 0; 4128c2ecf20Sopenharmony_ci else 4138c2ecf20Sopenharmony_ci vs2sel = 2; 4148c2ecf20Sopenharmony_ci 4158c2ecf20Sopenharmony_ci menelaus_set_mmc_slot(1, 0, 0, 0); 4168c2ecf20Sopenharmony_ci menelaus_set_mmc_slot(2, 0, vs2sel, 0); 4178c2ecf20Sopenharmony_ci} 4188c2ecf20Sopenharmony_ci 4198c2ecf20Sopenharmony_cistatic void n8x0_mmc_cleanup(struct device *dev) 4208c2ecf20Sopenharmony_ci{ 4218c2ecf20Sopenharmony_ci menelaus_unregister_mmc_callback(); 4228c2ecf20Sopenharmony_ci 4238c2ecf20Sopenharmony_ci gpio_free(N8X0_SLOT_SWITCH_GPIO); 4248c2ecf20Sopenharmony_ci 4258c2ecf20Sopenharmony_ci if (board_is_n810()) { 4268c2ecf20Sopenharmony_ci gpio_free(N810_EMMC_VSD_GPIO); 4278c2ecf20Sopenharmony_ci gpio_free(N810_EMMC_VIO_GPIO); 4288c2ecf20Sopenharmony_ci } 4298c2ecf20Sopenharmony_ci} 4308c2ecf20Sopenharmony_ci 4318c2ecf20Sopenharmony_ci/* 4328c2ecf20Sopenharmony_ci * MMC controller1 has two slots that are multiplexed via I2C. 4338c2ecf20Sopenharmony_ci * MMC controller2 is not in use. 4348c2ecf20Sopenharmony_ci */ 4358c2ecf20Sopenharmony_cistatic struct omap_mmc_platform_data mmc1_data = { 4368c2ecf20Sopenharmony_ci .nr_slots = 0, 4378c2ecf20Sopenharmony_ci .switch_slot = n8x0_mmc_switch_slot, 4388c2ecf20Sopenharmony_ci .init = n8x0_mmc_late_init, 4398c2ecf20Sopenharmony_ci .cleanup = n8x0_mmc_cleanup, 4408c2ecf20Sopenharmony_ci .shutdown = n8x0_mmc_shutdown, 4418c2ecf20Sopenharmony_ci .max_freq = 24000000, 4428c2ecf20Sopenharmony_ci .slots[0] = { 4438c2ecf20Sopenharmony_ci .wires = 4, 4448c2ecf20Sopenharmony_ci .set_power = n8x0_mmc_set_power, 4458c2ecf20Sopenharmony_ci .set_bus_mode = n8x0_mmc_set_bus_mode, 4468c2ecf20Sopenharmony_ci .get_cover_state = n8x0_mmc_get_cover_state, 4478c2ecf20Sopenharmony_ci .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 | 4488c2ecf20Sopenharmony_ci MMC_VDD_32_33 | MMC_VDD_33_34, 4498c2ecf20Sopenharmony_ci .name = "internal", 4508c2ecf20Sopenharmony_ci }, 4518c2ecf20Sopenharmony_ci .slots[1] = { 4528c2ecf20Sopenharmony_ci .set_power = n8x0_mmc_set_power, 4538c2ecf20Sopenharmony_ci .set_bus_mode = n8x0_mmc_set_bus_mode, 4548c2ecf20Sopenharmony_ci .get_cover_state = n8x0_mmc_get_cover_state, 4558c2ecf20Sopenharmony_ci .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 | 4568c2ecf20Sopenharmony_ci MMC_VDD_21_22 | MMC_VDD_22_23 | 4578c2ecf20Sopenharmony_ci MMC_VDD_23_24 | MMC_VDD_24_25 | 4588c2ecf20Sopenharmony_ci MMC_VDD_27_28 | MMC_VDD_28_29 | 4598c2ecf20Sopenharmony_ci MMC_VDD_29_30 | MMC_VDD_30_31 | 4608c2ecf20Sopenharmony_ci MMC_VDD_32_33 | MMC_VDD_33_34, 4618c2ecf20Sopenharmony_ci .name = "external", 4628c2ecf20Sopenharmony_ci }, 4638c2ecf20Sopenharmony_ci}; 4648c2ecf20Sopenharmony_ci 4658c2ecf20Sopenharmony_cistatic struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; 4668c2ecf20Sopenharmony_ci 4678c2ecf20Sopenharmony_cistatic struct gpio n810_emmc_gpios[] __initdata = { 4688c2ecf20Sopenharmony_ci { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" }, 4698c2ecf20Sopenharmony_ci { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" }, 4708c2ecf20Sopenharmony_ci}; 4718c2ecf20Sopenharmony_ci 4728c2ecf20Sopenharmony_cistatic void __init n8x0_mmc_init(void) 4738c2ecf20Sopenharmony_ci{ 4748c2ecf20Sopenharmony_ci int err; 4758c2ecf20Sopenharmony_ci 4768c2ecf20Sopenharmony_ci if (board_is_n810()) { 4778c2ecf20Sopenharmony_ci mmc1_data.slots[0].name = "external"; 4788c2ecf20Sopenharmony_ci 4798c2ecf20Sopenharmony_ci /* 4808c2ecf20Sopenharmony_ci * Some Samsung Movinand chips do not like open-ended 4818c2ecf20Sopenharmony_ci * multi-block reads and fall to braind-dead state 4828c2ecf20Sopenharmony_ci * while doing so. Reducing the number of blocks in 4838c2ecf20Sopenharmony_ci * the transfer or delays in clock disable do not help 4848c2ecf20Sopenharmony_ci */ 4858c2ecf20Sopenharmony_ci mmc1_data.slots[1].name = "internal"; 4868c2ecf20Sopenharmony_ci mmc1_data.slots[1].ban_openended = 1; 4878c2ecf20Sopenharmony_ci } 4888c2ecf20Sopenharmony_ci 4898c2ecf20Sopenharmony_ci err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW, 4908c2ecf20Sopenharmony_ci "MMC slot switch"); 4918c2ecf20Sopenharmony_ci if (err) 4928c2ecf20Sopenharmony_ci return; 4938c2ecf20Sopenharmony_ci 4948c2ecf20Sopenharmony_ci if (board_is_n810()) { 4958c2ecf20Sopenharmony_ci err = gpio_request_array(n810_emmc_gpios, 4968c2ecf20Sopenharmony_ci ARRAY_SIZE(n810_emmc_gpios)); 4978c2ecf20Sopenharmony_ci if (err) { 4988c2ecf20Sopenharmony_ci gpio_free(N8X0_SLOT_SWITCH_GPIO); 4998c2ecf20Sopenharmony_ci return; 5008c2ecf20Sopenharmony_ci } 5018c2ecf20Sopenharmony_ci } 5028c2ecf20Sopenharmony_ci 5038c2ecf20Sopenharmony_ci mmc1_data.nr_slots = 2; 5048c2ecf20Sopenharmony_ci mmc_data[0] = &mmc1_data; 5058c2ecf20Sopenharmony_ci} 5068c2ecf20Sopenharmony_ci#else 5078c2ecf20Sopenharmony_cistatic struct omap_mmc_platform_data mmc1_data; 5088c2ecf20Sopenharmony_civoid __init n8x0_mmc_init(void) 5098c2ecf20Sopenharmony_ci{ 5108c2ecf20Sopenharmony_ci} 5118c2ecf20Sopenharmony_ci#endif /* CONFIG_MMC_OMAP */ 5128c2ecf20Sopenharmony_ci 5138c2ecf20Sopenharmony_ci#ifdef CONFIG_MENELAUS 5148c2ecf20Sopenharmony_ci 5158c2ecf20Sopenharmony_cistatic int n8x0_auto_sleep_regulators(void) 5168c2ecf20Sopenharmony_ci{ 5178c2ecf20Sopenharmony_ci u32 val; 5188c2ecf20Sopenharmony_ci int ret; 5198c2ecf20Sopenharmony_ci 5208c2ecf20Sopenharmony_ci val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \ 5218c2ecf20Sopenharmony_ci | EN_VAUX_SLEEP | EN_VIO_SLEEP \ 5228c2ecf20Sopenharmony_ci | EN_VMEM_SLEEP | EN_DC3_SLEEP \ 5238c2ecf20Sopenharmony_ci | EN_VC_SLEEP | EN_DC2_SLEEP; 5248c2ecf20Sopenharmony_ci 5258c2ecf20Sopenharmony_ci ret = menelaus_set_regulator_sleep(1, val); 5268c2ecf20Sopenharmony_ci if (ret < 0) { 5278c2ecf20Sopenharmony_ci pr_err("Could not set regulators to sleep on menelaus: %u\n", 5288c2ecf20Sopenharmony_ci ret); 5298c2ecf20Sopenharmony_ci return ret; 5308c2ecf20Sopenharmony_ci } 5318c2ecf20Sopenharmony_ci return 0; 5328c2ecf20Sopenharmony_ci} 5338c2ecf20Sopenharmony_ci 5348c2ecf20Sopenharmony_cistatic int n8x0_auto_voltage_scale(void) 5358c2ecf20Sopenharmony_ci{ 5368c2ecf20Sopenharmony_ci int ret; 5378c2ecf20Sopenharmony_ci 5388c2ecf20Sopenharmony_ci ret = menelaus_set_vcore_hw(1400, 1050); 5398c2ecf20Sopenharmony_ci if (ret < 0) { 5408c2ecf20Sopenharmony_ci pr_err("Could not set VCORE voltage on menelaus: %u\n", ret); 5418c2ecf20Sopenharmony_ci return ret; 5428c2ecf20Sopenharmony_ci } 5438c2ecf20Sopenharmony_ci return 0; 5448c2ecf20Sopenharmony_ci} 5458c2ecf20Sopenharmony_ci 5468c2ecf20Sopenharmony_cistatic int n8x0_menelaus_late_init(struct device *dev) 5478c2ecf20Sopenharmony_ci{ 5488c2ecf20Sopenharmony_ci int ret; 5498c2ecf20Sopenharmony_ci 5508c2ecf20Sopenharmony_ci ret = n8x0_auto_voltage_scale(); 5518c2ecf20Sopenharmony_ci if (ret < 0) 5528c2ecf20Sopenharmony_ci return ret; 5538c2ecf20Sopenharmony_ci ret = n8x0_auto_sleep_regulators(); 5548c2ecf20Sopenharmony_ci if (ret < 0) 5558c2ecf20Sopenharmony_ci return ret; 5568c2ecf20Sopenharmony_ci return 0; 5578c2ecf20Sopenharmony_ci} 5588c2ecf20Sopenharmony_ci 5598c2ecf20Sopenharmony_ci#else 5608c2ecf20Sopenharmony_cistatic int n8x0_menelaus_late_init(struct device *dev) 5618c2ecf20Sopenharmony_ci{ 5628c2ecf20Sopenharmony_ci return 0; 5638c2ecf20Sopenharmony_ci} 5648c2ecf20Sopenharmony_ci#endif 5658c2ecf20Sopenharmony_ci 5668c2ecf20Sopenharmony_cistruct menelaus_platform_data n8x0_menelaus_platform_data = { 5678c2ecf20Sopenharmony_ci .late_init = n8x0_menelaus_late_init, 5688c2ecf20Sopenharmony_ci}; 5698c2ecf20Sopenharmony_ci 5708c2ecf20Sopenharmony_cistruct aic3x_pdata n810_aic33_data = { 5718c2ecf20Sopenharmony_ci .gpio_reset = 118, 5728c2ecf20Sopenharmony_ci}; 5738c2ecf20Sopenharmony_ci 5748c2ecf20Sopenharmony_cistatic int __init n8x0_late_initcall(void) 5758c2ecf20Sopenharmony_ci{ 5768c2ecf20Sopenharmony_ci if (!board_caps) 5778c2ecf20Sopenharmony_ci return -ENODEV; 5788c2ecf20Sopenharmony_ci 5798c2ecf20Sopenharmony_ci n8x0_mmc_init(); 5808c2ecf20Sopenharmony_ci n8x0_usb_init(); 5818c2ecf20Sopenharmony_ci 5828c2ecf20Sopenharmony_ci return 0; 5838c2ecf20Sopenharmony_ci} 5848c2ecf20Sopenharmony_ciomap_late_initcall(n8x0_late_initcall); 5858c2ecf20Sopenharmony_ci 5868c2ecf20Sopenharmony_ci/* 5878c2ecf20Sopenharmony_ci * Legacy init pdata init for n8x0. Note that we want to follow the 5888c2ecf20Sopenharmony_ci * I2C bus numbering starting at 0 for device tree like other omaps. 5898c2ecf20Sopenharmony_ci */ 5908c2ecf20Sopenharmony_civoid * __init n8x0_legacy_init(void) 5918c2ecf20Sopenharmony_ci{ 5928c2ecf20Sopenharmony_ci board_check_revision(); 5938c2ecf20Sopenharmony_ci spi_register_board_info(n800_spi_board_info, 5948c2ecf20Sopenharmony_ci ARRAY_SIZE(n800_spi_board_info)); 5958c2ecf20Sopenharmony_ci return &mmc1_data; 5968c2ecf20Sopenharmony_ci} 597