18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * arch/arm/plat-omap/include/mach/uncompress.h
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * Serial port stubs for kernel decompress status messages
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * Initially based on:
78c2ecf20Sopenharmony_ci * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
88c2ecf20Sopenharmony_ci * Copyright (C) 2000 RidgeRun, Inc.
98c2ecf20Sopenharmony_ci * Author: Greg Lonnon <glonnon@ridgerun.com>
108c2ecf20Sopenharmony_ci *
118c2ecf20Sopenharmony_ci * Rewritten by:
128c2ecf20Sopenharmony_ci * Author: <source@mvista.com>
138c2ecf20Sopenharmony_ci * 2004 (c) MontaVista Software, Inc.
148c2ecf20Sopenharmony_ci *
158c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public License
168c2ecf20Sopenharmony_ci * version 2. This program is licensed "as is" without any warranty of any
178c2ecf20Sopenharmony_ci * kind, whether express or implied.
188c2ecf20Sopenharmony_ci */
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci#include <linux/types.h>
218c2ecf20Sopenharmony_ci#include <linux/serial_reg.h>
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci#include <asm/memory.h>
248c2ecf20Sopenharmony_ci#include <asm/mach-types.h>
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#include "serial.h"
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci#define MDR1_MODE_MASK			0x07
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_civolatile u8 *uart_base;
318c2ecf20Sopenharmony_ciint uart_shift;
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci/*
348c2ecf20Sopenharmony_ci * Store the DEBUG_LL uart number into memory.
358c2ecf20Sopenharmony_ci * See also debug-macro.S, and serial.c for related code.
368c2ecf20Sopenharmony_ci */
378c2ecf20Sopenharmony_cistatic void set_omap_uart_info(unsigned char port)
388c2ecf20Sopenharmony_ci{
398c2ecf20Sopenharmony_ci	/*
408c2ecf20Sopenharmony_ci	 * Get address of some.bss variable and round it down
418c2ecf20Sopenharmony_ci	 * a la CONFIG_AUTO_ZRELADDR.
428c2ecf20Sopenharmony_ci	 */
438c2ecf20Sopenharmony_ci	u32 ram_start = (u32)&uart_shift & 0xf8000000;
448c2ecf20Sopenharmony_ci	u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
458c2ecf20Sopenharmony_ci	*uart_info = port;
468c2ecf20Sopenharmony_ci}
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_cistatic inline void putc(int c)
498c2ecf20Sopenharmony_ci{
508c2ecf20Sopenharmony_ci	if (!uart_base)
518c2ecf20Sopenharmony_ci		return;
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci	/* Check for UART 16x mode */
548c2ecf20Sopenharmony_ci	if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
558c2ecf20Sopenharmony_ci		return;
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci	while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
588c2ecf20Sopenharmony_ci		barrier();
598c2ecf20Sopenharmony_ci	uart_base[UART_TX << uart_shift] = c;
608c2ecf20Sopenharmony_ci}
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_cistatic inline void flush(void)
638c2ecf20Sopenharmony_ci{
648c2ecf20Sopenharmony_ci}
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci/*
678c2ecf20Sopenharmony_ci * Macros to configure UART1 and debug UART
688c2ecf20Sopenharmony_ci */
698c2ecf20Sopenharmony_ci#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id)		\
708c2ecf20Sopenharmony_ci	if (machine_is_##mach()) {					\
718c2ecf20Sopenharmony_ci		uart_base = (volatile u8 *)(dbg_uart);			\
728c2ecf20Sopenharmony_ci		uart_shift = (dbg_shft);				\
738c2ecf20Sopenharmony_ci		port = (dbg_id);					\
748c2ecf20Sopenharmony_ci		set_omap_uart_info(port);				\
758c2ecf20Sopenharmony_ci		break;							\
768c2ecf20Sopenharmony_ci	}
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci#define DEBUG_LL_OMAP7XX(p, mach)					\
798c2ecf20Sopenharmony_ci	_DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT,	\
808c2ecf20Sopenharmony_ci		OMAP1UART##p)
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci#define DEBUG_LL_OMAP1(p, mach)						\
838c2ecf20Sopenharmony_ci	_DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT,	\
848c2ecf20Sopenharmony_ci		OMAP1UART##p)
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_cistatic inline void arch_decomp_setup(void)
878c2ecf20Sopenharmony_ci{
888c2ecf20Sopenharmony_ci	int port = 0;
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci	/*
918c2ecf20Sopenharmony_ci	 * Initialize the port based on the machine ID from the bootloader.
928c2ecf20Sopenharmony_ci	 * Note that we're using macros here instead of switch statement
938c2ecf20Sopenharmony_ci	 * as machine_is functions are optimized out for the boards that
948c2ecf20Sopenharmony_ci	 * are not selected.
958c2ecf20Sopenharmony_ci	 */
968c2ecf20Sopenharmony_ci	do {
978c2ecf20Sopenharmony_ci		/* omap7xx/8xx based boards using UART1 with shift 0 */
988c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP7XX(1, herald);
998c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP7XX(1, omap_perseus2);
1008c2ecf20Sopenharmony_ci
1018c2ecf20Sopenharmony_ci		/* omap15xx/16xx based boards using UART1 */
1028c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, ams_delta);
1038c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, nokia770);
1048c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, omap_h2);
1058c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, omap_h3);
1068c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, omap_innovator);
1078c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, omap_osk);
1088c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, omap_palmte);
1098c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(1, omap_palmz71);
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci		/* omap15xx/16xx based boards using UART2 */
1128c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(2, omap_palmtt);
1138c2ecf20Sopenharmony_ci
1148c2ecf20Sopenharmony_ci		/* omap15xx/16xx based boards using UART3 */
1158c2ecf20Sopenharmony_ci		DEBUG_LL_OMAP1(3, sx1);
1168c2ecf20Sopenharmony_ci	} while (0);
1178c2ecf20Sopenharmony_ci}
118