18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Interrupt handler for OMAP-1510 FPGA 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2001 RidgeRun, Inc. 68c2ecf20Sopenharmony_ci * Author: Greg Lonnon <glonnon@ridgerun.com> 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Copyright (C) 2002 MontaVista Software, Inc. 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 118c2ecf20Sopenharmony_ci * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> 128c2ecf20Sopenharmony_ci */ 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci#ifndef __ASM_ARCH_OMAP_FPGA_H 158c2ecf20Sopenharmony_ci#define __ASM_ARCH_OMAP_FPGA_H 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci/* 188c2ecf20Sopenharmony_ci * --------------------------------------------------------------------------- 198c2ecf20Sopenharmony_ci * H2/P2 Debug board FPGA 208c2ecf20Sopenharmony_ci * --------------------------------------------------------------------------- 218c2ecf20Sopenharmony_ci */ 228c2ecf20Sopenharmony_ci/* maps in the FPGA registers and the ETHR registers */ 238c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ 248c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ 258c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) 288c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ 298c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */ 308c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */ 318c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */ 328c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */ 338c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */ 348c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */ 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci/* LEDs definition on debug board (16 LEDs, all physically green) */ 378c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LED_GREEN (1 << 15) 388c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LED_AMBER (1 << 14) 398c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LED_RED (1 << 13) 408c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LED_BLUE (1 << 12) 418c2ecf20Sopenharmony_ci/* cpu0 load-meter LEDs */ 428c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ... 438c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 448c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0) 478c2ecf20Sopenharmony_ci#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1) 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci#endif 50