1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * linux/arch/arm/mach-omap1/board-h3.c 4 * 5 * This file contains OMAP1710 H3 specific code. 6 * 7 * Copyright (C) 2004 Texas Instruments, Inc. 8 * Copyright (C) 2002 MontaVista Software, Inc. 9 * Copyright (C) 2001 RidgeRun, Inc. 10 * Author: RidgeRun, Inc. 11 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com 12 */ 13#include <linux/gpio.h> 14#include <linux/types.h> 15#include <linux/init.h> 16#include <linux/major.h> 17#include <linux/kernel.h> 18#include <linux/platform_device.h> 19#include <linux/errno.h> 20#include <linux/workqueue.h> 21#include <linux/i2c.h> 22#include <linux/mtd/mtd.h> 23#include <linux/mtd/platnand.h> 24#include <linux/mtd/partitions.h> 25#include <linux/mtd/physmap.h> 26#include <linux/input.h> 27#include <linux/spi/spi.h> 28#include <linux/mfd/tps65010.h> 29#include <linux/smc91x.h> 30#include <linux/omapfb.h> 31#include <linux/platform_data/gpio-omap.h> 32#include <linux/leds.h> 33 34#include <asm/setup.h> 35#include <asm/page.h> 36#include <asm/mach-types.h> 37#include <asm/mach/arch.h> 38#include <asm/mach/map.h> 39 40#include <mach/mux.h> 41#include <mach/tc.h> 42#include <linux/platform_data/keypad-omap.h> 43#include <linux/omap-dma.h> 44#include "flash.h" 45 46#include <mach/hardware.h> 47#include <mach/irqs.h> 48#include <mach/usb.h> 49 50#include "common.h" 51#include "board-h3.h" 52 53/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ 54#define OMAP1710_ETHR_START 0x04000300 55 56#define H3_TS_GPIO 48 57 58static const unsigned int h3_keymap[] = { 59 KEY(0, 0, KEY_LEFT), 60 KEY(1, 0, KEY_RIGHT), 61 KEY(2, 0, KEY_3), 62 KEY(3, 0, KEY_F10), 63 KEY(4, 0, KEY_F5), 64 KEY(5, 0, KEY_9), 65 KEY(0, 1, KEY_DOWN), 66 KEY(1, 1, KEY_UP), 67 KEY(2, 1, KEY_2), 68 KEY(3, 1, KEY_F9), 69 KEY(4, 1, KEY_F7), 70 KEY(5, 1, KEY_0), 71 KEY(0, 2, KEY_ENTER), 72 KEY(1, 2, KEY_6), 73 KEY(2, 2, KEY_1), 74 KEY(3, 2, KEY_F2), 75 KEY(4, 2, KEY_F6), 76 KEY(5, 2, KEY_HOME), 77 KEY(0, 3, KEY_8), 78 KEY(1, 3, KEY_5), 79 KEY(2, 3, KEY_F12), 80 KEY(3, 3, KEY_F3), 81 KEY(4, 3, KEY_F8), 82 KEY(5, 3, KEY_END), 83 KEY(0, 4, KEY_7), 84 KEY(1, 4, KEY_4), 85 KEY(2, 4, KEY_F11), 86 KEY(3, 4, KEY_F1), 87 KEY(4, 4, KEY_F4), 88 KEY(5, 4, KEY_ESC), 89 KEY(0, 5, KEY_F13), 90 KEY(1, 5, KEY_F14), 91 KEY(2, 5, KEY_F15), 92 KEY(3, 5, KEY_F16), 93 KEY(4, 5, KEY_SLEEP), 94}; 95 96 97static struct mtd_partition nor_partitions[] = { 98 /* bootloader (U-Boot, etc) in first sector */ 99 { 100 .name = "bootloader", 101 .offset = 0, 102 .size = SZ_128K, 103 .mask_flags = MTD_WRITEABLE, /* force read-only */ 104 }, 105 /* bootloader params in the next sector */ 106 { 107 .name = "params", 108 .offset = MTDPART_OFS_APPEND, 109 .size = SZ_128K, 110 .mask_flags = 0, 111 }, 112 /* kernel */ 113 { 114 .name = "kernel", 115 .offset = MTDPART_OFS_APPEND, 116 .size = SZ_2M, 117 .mask_flags = 0 118 }, 119 /* file system */ 120 { 121 .name = "filesystem", 122 .offset = MTDPART_OFS_APPEND, 123 .size = MTDPART_SIZ_FULL, 124 .mask_flags = 0 125 } 126}; 127 128static struct physmap_flash_data nor_data = { 129 .width = 2, 130 .set_vpp = omap1_set_vpp, 131 .parts = nor_partitions, 132 .nr_parts = ARRAY_SIZE(nor_partitions), 133}; 134 135static struct resource nor_resource = { 136 /* This is on CS3, wherever it's mapped */ 137 .flags = IORESOURCE_MEM, 138}; 139 140static struct platform_device nor_device = { 141 .name = "physmap-flash", 142 .id = 0, 143 .dev = { 144 .platform_data = &nor_data, 145 }, 146 .num_resources = 1, 147 .resource = &nor_resource, 148}; 149 150static struct mtd_partition nand_partitions[] = { 151#if 0 152 /* REVISIT: enable these partitions if you make NAND BOOT work */ 153 { 154 .name = "xloader", 155 .offset = 0, 156 .size = 64 * 1024, 157 .mask_flags = MTD_WRITEABLE, /* force read-only */ 158 }, 159 { 160 .name = "bootloader", 161 .offset = MTDPART_OFS_APPEND, 162 .size = 256 * 1024, 163 .mask_flags = MTD_WRITEABLE, /* force read-only */ 164 }, 165 { 166 .name = "params", 167 .offset = MTDPART_OFS_APPEND, 168 .size = 192 * 1024, 169 }, 170 { 171 .name = "kernel", 172 .offset = MTDPART_OFS_APPEND, 173 .size = 2 * SZ_1M, 174 }, 175#endif 176 { 177 .name = "filesystem", 178 .size = MTDPART_SIZ_FULL, 179 .offset = MTDPART_OFS_APPEND, 180 }, 181}; 182 183#define H3_NAND_RB_GPIO_PIN 10 184 185static int nand_dev_ready(struct nand_chip *chip) 186{ 187 return gpio_get_value(H3_NAND_RB_GPIO_PIN); 188} 189 190static struct platform_nand_data nand_platdata = { 191 .chip = { 192 .nr_chips = 1, 193 .chip_offset = 0, 194 .nr_partitions = ARRAY_SIZE(nand_partitions), 195 .partitions = nand_partitions, 196 .options = NAND_SAMSUNG_LP_OPTIONS, 197 }, 198 .ctrl = { 199 .cmd_ctrl = omap1_nand_cmd_ctl, 200 .dev_ready = nand_dev_ready, 201 202 }, 203}; 204 205static struct resource nand_resource = { 206 .flags = IORESOURCE_MEM, 207}; 208 209static struct platform_device nand_device = { 210 .name = "gen_nand", 211 .id = 0, 212 .dev = { 213 .platform_data = &nand_platdata, 214 }, 215 .num_resources = 1, 216 .resource = &nand_resource, 217}; 218 219static struct smc91x_platdata smc91x_info = { 220 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 221 .leda = RPC_LED_100_10, 222 .ledb = RPC_LED_TX_RX, 223}; 224 225static struct resource smc91x_resources[] = { 226 [0] = { 227 .start = OMAP1710_ETHR_START, /* Physical */ 228 .end = OMAP1710_ETHR_START + 0xf, 229 .flags = IORESOURCE_MEM, 230 }, 231 [1] = { 232 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 233 }, 234}; 235 236static struct platform_device smc91x_device = { 237 .name = "smc91x", 238 .id = 0, 239 .dev = { 240 .platform_data = &smc91x_info, 241 }, 242 .num_resources = ARRAY_SIZE(smc91x_resources), 243 .resource = smc91x_resources, 244}; 245 246static void __init h3_init_smc91x(void) 247{ 248 omap_cfg_reg(W15_1710_GPIO40); 249 if (gpio_request(40, "SMC91x irq") < 0) { 250 printk("Error requesting gpio 40 for smc91x irq\n"); 251 return; 252 } 253} 254 255#define GPTIMER_BASE 0xFFFB1400 256#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) 257#define GPTIMER_REGS_SIZE 0x46 258 259static struct resource intlat_resources[] = { 260 [0] = { 261 .start = GPTIMER_REGS(0), /* Physical */ 262 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE, 263 .flags = IORESOURCE_MEM, 264 }, 265 [1] = { 266 .start = INT_1610_GPTIMER1, 267 .end = INT_1610_GPTIMER1, 268 .flags = IORESOURCE_IRQ, 269 }, 270}; 271 272static struct platform_device intlat_device = { 273 .name = "omap_intlat", 274 .id = 0, 275 .num_resources = ARRAY_SIZE(intlat_resources), 276 .resource = intlat_resources, 277}; 278 279static struct resource h3_kp_resources[] = { 280 [0] = { 281 .start = INT_KEYBOARD, 282 .end = INT_KEYBOARD, 283 .flags = IORESOURCE_IRQ, 284 }, 285}; 286 287static const struct matrix_keymap_data h3_keymap_data = { 288 .keymap = h3_keymap, 289 .keymap_size = ARRAY_SIZE(h3_keymap), 290}; 291 292static struct omap_kp_platform_data h3_kp_data = { 293 .rows = 8, 294 .cols = 8, 295 .keymap_data = &h3_keymap_data, 296 .rep = true, 297 .delay = 9, 298 .dbounce = true, 299}; 300 301static struct platform_device h3_kp_device = { 302 .name = "omap-keypad", 303 .id = -1, 304 .dev = { 305 .platform_data = &h3_kp_data, 306 }, 307 .num_resources = ARRAY_SIZE(h3_kp_resources), 308 .resource = h3_kp_resources, 309}; 310 311static struct platform_device h3_lcd_device = { 312 .name = "lcd_h3", 313 .id = -1, 314}; 315 316static struct spi_board_info h3_spi_board_info[] __initdata = { 317 [0] = { 318 .modalias = "tsc2101", 319 .bus_num = 2, 320 .chip_select = 0, 321 .max_speed_hz = 16000000, 322 /* .platform_data = &tsc_platform_data, */ 323 }, 324}; 325 326static const struct gpio_led h3_gpio_led_pins[] = { 327 { 328 .name = "h3:red", 329 .default_trigger = "heartbeat", 330 .gpio = 3, 331 }, 332 { 333 .name = "h3:green", 334 .default_trigger = "cpu0", 335 .gpio = OMAP_MPUIO(4), 336 }, 337}; 338 339static struct gpio_led_platform_data h3_gpio_led_data = { 340 .leds = h3_gpio_led_pins, 341 .num_leds = ARRAY_SIZE(h3_gpio_led_pins), 342}; 343 344static struct platform_device h3_gpio_leds = { 345 .name = "leds-gpio", 346 .id = -1, 347 .dev = { 348 .platform_data = &h3_gpio_led_data, 349 }, 350}; 351 352static struct platform_device *devices[] __initdata = { 353 &nor_device, 354 &nand_device, 355 &smc91x_device, 356 &intlat_device, 357 &h3_kp_device, 358 &h3_lcd_device, 359 &h3_gpio_leds, 360}; 361 362static struct omap_usb_config h3_usb_config __initdata = { 363 /* usb1 has a Mini-AB port and external isp1301 transceiver */ 364 .otg = 2, 365 366#if IS_ENABLED(CONFIG_USB_OMAP) 367 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */ 368#elif IS_ENABLED(CONFIG_USB_OHCI_HCD) 369 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */ 370 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */ 371#endif 372 373 .pins[1] = 3, 374}; 375 376static const struct omap_lcd_config h3_lcd_config __initconst = { 377 .ctrl_name = "internal", 378}; 379 380static struct i2c_board_info __initdata h3_i2c_board_info[] = { 381 { 382 I2C_BOARD_INFO("tps65013", 0x48), 383 }, 384 { 385 I2C_BOARD_INFO("isp1301_omap", 0x2d), 386 }, 387}; 388 389static void __init h3_init(void) 390{ 391 h3_init_smc91x(); 392 393 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped 394 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will 395 * notice whether a NAND chip is enabled at probe time. 396 * 397 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND 398 * (which on H2 may be 16bit) on CS3. Try detecting that in code here, 399 * to avoid probing every possible flash configuration... 400 */ 401 nor_resource.end = nor_resource.start = omap_cs3_phys(); 402 nor_resource.end += SZ_32M - 1; 403 404 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; 405 nand_resource.end += SZ_4K - 1; 406 BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0); 407 gpio_direction_input(H3_NAND_RB_GPIO_PIN); 408 409 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ 410 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ 411 omap_cfg_reg(V2_1710_GPIO10); 412 413 /* Mux pins for keypad */ 414 omap_cfg_reg(F18_1610_KBC0); 415 omap_cfg_reg(D20_1610_KBC1); 416 omap_cfg_reg(D19_1610_KBC2); 417 omap_cfg_reg(E18_1610_KBC3); 418 omap_cfg_reg(C21_1610_KBC4); 419 omap_cfg_reg(G18_1610_KBR0); 420 omap_cfg_reg(F19_1610_KBR1); 421 omap_cfg_reg(H14_1610_KBR2); 422 omap_cfg_reg(E20_1610_KBR3); 423 omap_cfg_reg(E19_1610_KBR4); 424 omap_cfg_reg(N19_1610_KBR5); 425 426 /* GPIO based LEDs */ 427 omap_cfg_reg(P18_1610_GPIO3); 428 omap_cfg_reg(MPUIO4); 429 430 smc91x_resources[1].start = gpio_to_irq(40); 431 smc91x_resources[1].end = gpio_to_irq(40); 432 platform_add_devices(devices, ARRAY_SIZE(devices)); 433 h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO); 434 spi_register_board_info(h3_spi_board_info, 435 ARRAY_SIZE(h3_spi_board_info)); 436 omap_serial_init(); 437 h3_i2c_board_info[1].irq = gpio_to_irq(14); 438 omap_register_i2c_bus(1, 100, h3_i2c_board_info, 439 ARRAY_SIZE(h3_i2c_board_info)); 440 omap1_usb_init(&h3_usb_config); 441 h3_mmc_init(); 442 443 omapfb_set_lcd_config(&h3_lcd_config); 444} 445 446MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") 447 /* Maintainer: Texas Instruments, Inc. */ 448 .atag_offset = 0x100, 449 .map_io = omap16xx_map_io, 450 .init_early = omap1_init_early, 451 .init_irq = omap1_init_irq, 452 .handle_irq = omap1_handle_irq, 453 .init_machine = h3_init, 454 .init_late = omap1_init_late, 455 .init_time = omap1_timer_init, 456 .restart = omap1_restart, 457MACHINE_END 458