18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * linux/arch/arm/mach-omap1/board-h3.c 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * This file contains OMAP1710 H3 specific code. 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Copyright (C) 2004 Texas Instruments, Inc. 88c2ecf20Sopenharmony_ci * Copyright (C) 2002 MontaVista Software, Inc. 98c2ecf20Sopenharmony_ci * Copyright (C) 2001 RidgeRun, Inc. 108c2ecf20Sopenharmony_ci * Author: RidgeRun, Inc. 118c2ecf20Sopenharmony_ci * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com 128c2ecf20Sopenharmony_ci */ 138c2ecf20Sopenharmony_ci#include <linux/gpio.h> 148c2ecf20Sopenharmony_ci#include <linux/types.h> 158c2ecf20Sopenharmony_ci#include <linux/init.h> 168c2ecf20Sopenharmony_ci#include <linux/major.h> 178c2ecf20Sopenharmony_ci#include <linux/kernel.h> 188c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 198c2ecf20Sopenharmony_ci#include <linux/errno.h> 208c2ecf20Sopenharmony_ci#include <linux/workqueue.h> 218c2ecf20Sopenharmony_ci#include <linux/i2c.h> 228c2ecf20Sopenharmony_ci#include <linux/mtd/mtd.h> 238c2ecf20Sopenharmony_ci#include <linux/mtd/platnand.h> 248c2ecf20Sopenharmony_ci#include <linux/mtd/partitions.h> 258c2ecf20Sopenharmony_ci#include <linux/mtd/physmap.h> 268c2ecf20Sopenharmony_ci#include <linux/input.h> 278c2ecf20Sopenharmony_ci#include <linux/spi/spi.h> 288c2ecf20Sopenharmony_ci#include <linux/mfd/tps65010.h> 298c2ecf20Sopenharmony_ci#include <linux/smc91x.h> 308c2ecf20Sopenharmony_ci#include <linux/omapfb.h> 318c2ecf20Sopenharmony_ci#include <linux/platform_data/gpio-omap.h> 328c2ecf20Sopenharmony_ci#include <linux/leds.h> 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci#include <asm/setup.h> 358c2ecf20Sopenharmony_ci#include <asm/page.h> 368c2ecf20Sopenharmony_ci#include <asm/mach-types.h> 378c2ecf20Sopenharmony_ci#include <asm/mach/arch.h> 388c2ecf20Sopenharmony_ci#include <asm/mach/map.h> 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci#include <mach/mux.h> 418c2ecf20Sopenharmony_ci#include <mach/tc.h> 428c2ecf20Sopenharmony_ci#include <linux/platform_data/keypad-omap.h> 438c2ecf20Sopenharmony_ci#include <linux/omap-dma.h> 448c2ecf20Sopenharmony_ci#include "flash.h" 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci#include <mach/hardware.h> 478c2ecf20Sopenharmony_ci#include <mach/irqs.h> 488c2ecf20Sopenharmony_ci#include <mach/usb.h> 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci#include "common.h" 518c2ecf20Sopenharmony_ci#include "board-h3.h" 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ 548c2ecf20Sopenharmony_ci#define OMAP1710_ETHR_START 0x04000300 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci#define H3_TS_GPIO 48 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_cistatic const unsigned int h3_keymap[] = { 598c2ecf20Sopenharmony_ci KEY(0, 0, KEY_LEFT), 608c2ecf20Sopenharmony_ci KEY(1, 0, KEY_RIGHT), 618c2ecf20Sopenharmony_ci KEY(2, 0, KEY_3), 628c2ecf20Sopenharmony_ci KEY(3, 0, KEY_F10), 638c2ecf20Sopenharmony_ci KEY(4, 0, KEY_F5), 648c2ecf20Sopenharmony_ci KEY(5, 0, KEY_9), 658c2ecf20Sopenharmony_ci KEY(0, 1, KEY_DOWN), 668c2ecf20Sopenharmony_ci KEY(1, 1, KEY_UP), 678c2ecf20Sopenharmony_ci KEY(2, 1, KEY_2), 688c2ecf20Sopenharmony_ci KEY(3, 1, KEY_F9), 698c2ecf20Sopenharmony_ci KEY(4, 1, KEY_F7), 708c2ecf20Sopenharmony_ci KEY(5, 1, KEY_0), 718c2ecf20Sopenharmony_ci KEY(0, 2, KEY_ENTER), 728c2ecf20Sopenharmony_ci KEY(1, 2, KEY_6), 738c2ecf20Sopenharmony_ci KEY(2, 2, KEY_1), 748c2ecf20Sopenharmony_ci KEY(3, 2, KEY_F2), 758c2ecf20Sopenharmony_ci KEY(4, 2, KEY_F6), 768c2ecf20Sopenharmony_ci KEY(5, 2, KEY_HOME), 778c2ecf20Sopenharmony_ci KEY(0, 3, KEY_8), 788c2ecf20Sopenharmony_ci KEY(1, 3, KEY_5), 798c2ecf20Sopenharmony_ci KEY(2, 3, KEY_F12), 808c2ecf20Sopenharmony_ci KEY(3, 3, KEY_F3), 818c2ecf20Sopenharmony_ci KEY(4, 3, KEY_F8), 828c2ecf20Sopenharmony_ci KEY(5, 3, KEY_END), 838c2ecf20Sopenharmony_ci KEY(0, 4, KEY_7), 848c2ecf20Sopenharmony_ci KEY(1, 4, KEY_4), 858c2ecf20Sopenharmony_ci KEY(2, 4, KEY_F11), 868c2ecf20Sopenharmony_ci KEY(3, 4, KEY_F1), 878c2ecf20Sopenharmony_ci KEY(4, 4, KEY_F4), 888c2ecf20Sopenharmony_ci KEY(5, 4, KEY_ESC), 898c2ecf20Sopenharmony_ci KEY(0, 5, KEY_F13), 908c2ecf20Sopenharmony_ci KEY(1, 5, KEY_F14), 918c2ecf20Sopenharmony_ci KEY(2, 5, KEY_F15), 928c2ecf20Sopenharmony_ci KEY(3, 5, KEY_F16), 938c2ecf20Sopenharmony_ci KEY(4, 5, KEY_SLEEP), 948c2ecf20Sopenharmony_ci}; 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_cistatic struct mtd_partition nor_partitions[] = { 988c2ecf20Sopenharmony_ci /* bootloader (U-Boot, etc) in first sector */ 998c2ecf20Sopenharmony_ci { 1008c2ecf20Sopenharmony_ci .name = "bootloader", 1018c2ecf20Sopenharmony_ci .offset = 0, 1028c2ecf20Sopenharmony_ci .size = SZ_128K, 1038c2ecf20Sopenharmony_ci .mask_flags = MTD_WRITEABLE, /* force read-only */ 1048c2ecf20Sopenharmony_ci }, 1058c2ecf20Sopenharmony_ci /* bootloader params in the next sector */ 1068c2ecf20Sopenharmony_ci { 1078c2ecf20Sopenharmony_ci .name = "params", 1088c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 1098c2ecf20Sopenharmony_ci .size = SZ_128K, 1108c2ecf20Sopenharmony_ci .mask_flags = 0, 1118c2ecf20Sopenharmony_ci }, 1128c2ecf20Sopenharmony_ci /* kernel */ 1138c2ecf20Sopenharmony_ci { 1148c2ecf20Sopenharmony_ci .name = "kernel", 1158c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 1168c2ecf20Sopenharmony_ci .size = SZ_2M, 1178c2ecf20Sopenharmony_ci .mask_flags = 0 1188c2ecf20Sopenharmony_ci }, 1198c2ecf20Sopenharmony_ci /* file system */ 1208c2ecf20Sopenharmony_ci { 1218c2ecf20Sopenharmony_ci .name = "filesystem", 1228c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 1238c2ecf20Sopenharmony_ci .size = MTDPART_SIZ_FULL, 1248c2ecf20Sopenharmony_ci .mask_flags = 0 1258c2ecf20Sopenharmony_ci } 1268c2ecf20Sopenharmony_ci}; 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_cistatic struct physmap_flash_data nor_data = { 1298c2ecf20Sopenharmony_ci .width = 2, 1308c2ecf20Sopenharmony_ci .set_vpp = omap1_set_vpp, 1318c2ecf20Sopenharmony_ci .parts = nor_partitions, 1328c2ecf20Sopenharmony_ci .nr_parts = ARRAY_SIZE(nor_partitions), 1338c2ecf20Sopenharmony_ci}; 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_cistatic struct resource nor_resource = { 1368c2ecf20Sopenharmony_ci /* This is on CS3, wherever it's mapped */ 1378c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 1388c2ecf20Sopenharmony_ci}; 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_cistatic struct platform_device nor_device = { 1418c2ecf20Sopenharmony_ci .name = "physmap-flash", 1428c2ecf20Sopenharmony_ci .id = 0, 1438c2ecf20Sopenharmony_ci .dev = { 1448c2ecf20Sopenharmony_ci .platform_data = &nor_data, 1458c2ecf20Sopenharmony_ci }, 1468c2ecf20Sopenharmony_ci .num_resources = 1, 1478c2ecf20Sopenharmony_ci .resource = &nor_resource, 1488c2ecf20Sopenharmony_ci}; 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_cistatic struct mtd_partition nand_partitions[] = { 1518c2ecf20Sopenharmony_ci#if 0 1528c2ecf20Sopenharmony_ci /* REVISIT: enable these partitions if you make NAND BOOT work */ 1538c2ecf20Sopenharmony_ci { 1548c2ecf20Sopenharmony_ci .name = "xloader", 1558c2ecf20Sopenharmony_ci .offset = 0, 1568c2ecf20Sopenharmony_ci .size = 64 * 1024, 1578c2ecf20Sopenharmony_ci .mask_flags = MTD_WRITEABLE, /* force read-only */ 1588c2ecf20Sopenharmony_ci }, 1598c2ecf20Sopenharmony_ci { 1608c2ecf20Sopenharmony_ci .name = "bootloader", 1618c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 1628c2ecf20Sopenharmony_ci .size = 256 * 1024, 1638c2ecf20Sopenharmony_ci .mask_flags = MTD_WRITEABLE, /* force read-only */ 1648c2ecf20Sopenharmony_ci }, 1658c2ecf20Sopenharmony_ci { 1668c2ecf20Sopenharmony_ci .name = "params", 1678c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 1688c2ecf20Sopenharmony_ci .size = 192 * 1024, 1698c2ecf20Sopenharmony_ci }, 1708c2ecf20Sopenharmony_ci { 1718c2ecf20Sopenharmony_ci .name = "kernel", 1728c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 1738c2ecf20Sopenharmony_ci .size = 2 * SZ_1M, 1748c2ecf20Sopenharmony_ci }, 1758c2ecf20Sopenharmony_ci#endif 1768c2ecf20Sopenharmony_ci { 1778c2ecf20Sopenharmony_ci .name = "filesystem", 1788c2ecf20Sopenharmony_ci .size = MTDPART_SIZ_FULL, 1798c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 1808c2ecf20Sopenharmony_ci }, 1818c2ecf20Sopenharmony_ci}; 1828c2ecf20Sopenharmony_ci 1838c2ecf20Sopenharmony_ci#define H3_NAND_RB_GPIO_PIN 10 1848c2ecf20Sopenharmony_ci 1858c2ecf20Sopenharmony_cistatic int nand_dev_ready(struct nand_chip *chip) 1868c2ecf20Sopenharmony_ci{ 1878c2ecf20Sopenharmony_ci return gpio_get_value(H3_NAND_RB_GPIO_PIN); 1888c2ecf20Sopenharmony_ci} 1898c2ecf20Sopenharmony_ci 1908c2ecf20Sopenharmony_cistatic struct platform_nand_data nand_platdata = { 1918c2ecf20Sopenharmony_ci .chip = { 1928c2ecf20Sopenharmony_ci .nr_chips = 1, 1938c2ecf20Sopenharmony_ci .chip_offset = 0, 1948c2ecf20Sopenharmony_ci .nr_partitions = ARRAY_SIZE(nand_partitions), 1958c2ecf20Sopenharmony_ci .partitions = nand_partitions, 1968c2ecf20Sopenharmony_ci .options = NAND_SAMSUNG_LP_OPTIONS, 1978c2ecf20Sopenharmony_ci }, 1988c2ecf20Sopenharmony_ci .ctrl = { 1998c2ecf20Sopenharmony_ci .cmd_ctrl = omap1_nand_cmd_ctl, 2008c2ecf20Sopenharmony_ci .dev_ready = nand_dev_ready, 2018c2ecf20Sopenharmony_ci 2028c2ecf20Sopenharmony_ci }, 2038c2ecf20Sopenharmony_ci}; 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_cistatic struct resource nand_resource = { 2068c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 2078c2ecf20Sopenharmony_ci}; 2088c2ecf20Sopenharmony_ci 2098c2ecf20Sopenharmony_cistatic struct platform_device nand_device = { 2108c2ecf20Sopenharmony_ci .name = "gen_nand", 2118c2ecf20Sopenharmony_ci .id = 0, 2128c2ecf20Sopenharmony_ci .dev = { 2138c2ecf20Sopenharmony_ci .platform_data = &nand_platdata, 2148c2ecf20Sopenharmony_ci }, 2158c2ecf20Sopenharmony_ci .num_resources = 1, 2168c2ecf20Sopenharmony_ci .resource = &nand_resource, 2178c2ecf20Sopenharmony_ci}; 2188c2ecf20Sopenharmony_ci 2198c2ecf20Sopenharmony_cistatic struct smc91x_platdata smc91x_info = { 2208c2ecf20Sopenharmony_ci .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 2218c2ecf20Sopenharmony_ci .leda = RPC_LED_100_10, 2228c2ecf20Sopenharmony_ci .ledb = RPC_LED_TX_RX, 2238c2ecf20Sopenharmony_ci}; 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_cistatic struct resource smc91x_resources[] = { 2268c2ecf20Sopenharmony_ci [0] = { 2278c2ecf20Sopenharmony_ci .start = OMAP1710_ETHR_START, /* Physical */ 2288c2ecf20Sopenharmony_ci .end = OMAP1710_ETHR_START + 0xf, 2298c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 2308c2ecf20Sopenharmony_ci }, 2318c2ecf20Sopenharmony_ci [1] = { 2328c2ecf20Sopenharmony_ci .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 2338c2ecf20Sopenharmony_ci }, 2348c2ecf20Sopenharmony_ci}; 2358c2ecf20Sopenharmony_ci 2368c2ecf20Sopenharmony_cistatic struct platform_device smc91x_device = { 2378c2ecf20Sopenharmony_ci .name = "smc91x", 2388c2ecf20Sopenharmony_ci .id = 0, 2398c2ecf20Sopenharmony_ci .dev = { 2408c2ecf20Sopenharmony_ci .platform_data = &smc91x_info, 2418c2ecf20Sopenharmony_ci }, 2428c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(smc91x_resources), 2438c2ecf20Sopenharmony_ci .resource = smc91x_resources, 2448c2ecf20Sopenharmony_ci}; 2458c2ecf20Sopenharmony_ci 2468c2ecf20Sopenharmony_cistatic void __init h3_init_smc91x(void) 2478c2ecf20Sopenharmony_ci{ 2488c2ecf20Sopenharmony_ci omap_cfg_reg(W15_1710_GPIO40); 2498c2ecf20Sopenharmony_ci if (gpio_request(40, "SMC91x irq") < 0) { 2508c2ecf20Sopenharmony_ci printk("Error requesting gpio 40 for smc91x irq\n"); 2518c2ecf20Sopenharmony_ci return; 2528c2ecf20Sopenharmony_ci } 2538c2ecf20Sopenharmony_ci} 2548c2ecf20Sopenharmony_ci 2558c2ecf20Sopenharmony_ci#define GPTIMER_BASE 0xFFFB1400 2568c2ecf20Sopenharmony_ci#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) 2578c2ecf20Sopenharmony_ci#define GPTIMER_REGS_SIZE 0x46 2588c2ecf20Sopenharmony_ci 2598c2ecf20Sopenharmony_cistatic struct resource intlat_resources[] = { 2608c2ecf20Sopenharmony_ci [0] = { 2618c2ecf20Sopenharmony_ci .start = GPTIMER_REGS(0), /* Physical */ 2628c2ecf20Sopenharmony_ci .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE, 2638c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 2648c2ecf20Sopenharmony_ci }, 2658c2ecf20Sopenharmony_ci [1] = { 2668c2ecf20Sopenharmony_ci .start = INT_1610_GPTIMER1, 2678c2ecf20Sopenharmony_ci .end = INT_1610_GPTIMER1, 2688c2ecf20Sopenharmony_ci .flags = IORESOURCE_IRQ, 2698c2ecf20Sopenharmony_ci }, 2708c2ecf20Sopenharmony_ci}; 2718c2ecf20Sopenharmony_ci 2728c2ecf20Sopenharmony_cistatic struct platform_device intlat_device = { 2738c2ecf20Sopenharmony_ci .name = "omap_intlat", 2748c2ecf20Sopenharmony_ci .id = 0, 2758c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(intlat_resources), 2768c2ecf20Sopenharmony_ci .resource = intlat_resources, 2778c2ecf20Sopenharmony_ci}; 2788c2ecf20Sopenharmony_ci 2798c2ecf20Sopenharmony_cistatic struct resource h3_kp_resources[] = { 2808c2ecf20Sopenharmony_ci [0] = { 2818c2ecf20Sopenharmony_ci .start = INT_KEYBOARD, 2828c2ecf20Sopenharmony_ci .end = INT_KEYBOARD, 2838c2ecf20Sopenharmony_ci .flags = IORESOURCE_IRQ, 2848c2ecf20Sopenharmony_ci }, 2858c2ecf20Sopenharmony_ci}; 2868c2ecf20Sopenharmony_ci 2878c2ecf20Sopenharmony_cistatic const struct matrix_keymap_data h3_keymap_data = { 2888c2ecf20Sopenharmony_ci .keymap = h3_keymap, 2898c2ecf20Sopenharmony_ci .keymap_size = ARRAY_SIZE(h3_keymap), 2908c2ecf20Sopenharmony_ci}; 2918c2ecf20Sopenharmony_ci 2928c2ecf20Sopenharmony_cistatic struct omap_kp_platform_data h3_kp_data = { 2938c2ecf20Sopenharmony_ci .rows = 8, 2948c2ecf20Sopenharmony_ci .cols = 8, 2958c2ecf20Sopenharmony_ci .keymap_data = &h3_keymap_data, 2968c2ecf20Sopenharmony_ci .rep = true, 2978c2ecf20Sopenharmony_ci .delay = 9, 2988c2ecf20Sopenharmony_ci .dbounce = true, 2998c2ecf20Sopenharmony_ci}; 3008c2ecf20Sopenharmony_ci 3018c2ecf20Sopenharmony_cistatic struct platform_device h3_kp_device = { 3028c2ecf20Sopenharmony_ci .name = "omap-keypad", 3038c2ecf20Sopenharmony_ci .id = -1, 3048c2ecf20Sopenharmony_ci .dev = { 3058c2ecf20Sopenharmony_ci .platform_data = &h3_kp_data, 3068c2ecf20Sopenharmony_ci }, 3078c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(h3_kp_resources), 3088c2ecf20Sopenharmony_ci .resource = h3_kp_resources, 3098c2ecf20Sopenharmony_ci}; 3108c2ecf20Sopenharmony_ci 3118c2ecf20Sopenharmony_cistatic struct platform_device h3_lcd_device = { 3128c2ecf20Sopenharmony_ci .name = "lcd_h3", 3138c2ecf20Sopenharmony_ci .id = -1, 3148c2ecf20Sopenharmony_ci}; 3158c2ecf20Sopenharmony_ci 3168c2ecf20Sopenharmony_cistatic struct spi_board_info h3_spi_board_info[] __initdata = { 3178c2ecf20Sopenharmony_ci [0] = { 3188c2ecf20Sopenharmony_ci .modalias = "tsc2101", 3198c2ecf20Sopenharmony_ci .bus_num = 2, 3208c2ecf20Sopenharmony_ci .chip_select = 0, 3218c2ecf20Sopenharmony_ci .max_speed_hz = 16000000, 3228c2ecf20Sopenharmony_ci /* .platform_data = &tsc_platform_data, */ 3238c2ecf20Sopenharmony_ci }, 3248c2ecf20Sopenharmony_ci}; 3258c2ecf20Sopenharmony_ci 3268c2ecf20Sopenharmony_cistatic const struct gpio_led h3_gpio_led_pins[] = { 3278c2ecf20Sopenharmony_ci { 3288c2ecf20Sopenharmony_ci .name = "h3:red", 3298c2ecf20Sopenharmony_ci .default_trigger = "heartbeat", 3308c2ecf20Sopenharmony_ci .gpio = 3, 3318c2ecf20Sopenharmony_ci }, 3328c2ecf20Sopenharmony_ci { 3338c2ecf20Sopenharmony_ci .name = "h3:green", 3348c2ecf20Sopenharmony_ci .default_trigger = "cpu0", 3358c2ecf20Sopenharmony_ci .gpio = OMAP_MPUIO(4), 3368c2ecf20Sopenharmony_ci }, 3378c2ecf20Sopenharmony_ci}; 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_cistatic struct gpio_led_platform_data h3_gpio_led_data = { 3408c2ecf20Sopenharmony_ci .leds = h3_gpio_led_pins, 3418c2ecf20Sopenharmony_ci .num_leds = ARRAY_SIZE(h3_gpio_led_pins), 3428c2ecf20Sopenharmony_ci}; 3438c2ecf20Sopenharmony_ci 3448c2ecf20Sopenharmony_cistatic struct platform_device h3_gpio_leds = { 3458c2ecf20Sopenharmony_ci .name = "leds-gpio", 3468c2ecf20Sopenharmony_ci .id = -1, 3478c2ecf20Sopenharmony_ci .dev = { 3488c2ecf20Sopenharmony_ci .platform_data = &h3_gpio_led_data, 3498c2ecf20Sopenharmony_ci }, 3508c2ecf20Sopenharmony_ci}; 3518c2ecf20Sopenharmony_ci 3528c2ecf20Sopenharmony_cistatic struct platform_device *devices[] __initdata = { 3538c2ecf20Sopenharmony_ci &nor_device, 3548c2ecf20Sopenharmony_ci &nand_device, 3558c2ecf20Sopenharmony_ci &smc91x_device, 3568c2ecf20Sopenharmony_ci &intlat_device, 3578c2ecf20Sopenharmony_ci &h3_kp_device, 3588c2ecf20Sopenharmony_ci &h3_lcd_device, 3598c2ecf20Sopenharmony_ci &h3_gpio_leds, 3608c2ecf20Sopenharmony_ci}; 3618c2ecf20Sopenharmony_ci 3628c2ecf20Sopenharmony_cistatic struct omap_usb_config h3_usb_config __initdata = { 3638c2ecf20Sopenharmony_ci /* usb1 has a Mini-AB port and external isp1301 transceiver */ 3648c2ecf20Sopenharmony_ci .otg = 2, 3658c2ecf20Sopenharmony_ci 3668c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_USB_OMAP) 3678c2ecf20Sopenharmony_ci .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */ 3688c2ecf20Sopenharmony_ci#elif IS_ENABLED(CONFIG_USB_OHCI_HCD) 3698c2ecf20Sopenharmony_ci /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */ 3708c2ecf20Sopenharmony_ci .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */ 3718c2ecf20Sopenharmony_ci#endif 3728c2ecf20Sopenharmony_ci 3738c2ecf20Sopenharmony_ci .pins[1] = 3, 3748c2ecf20Sopenharmony_ci}; 3758c2ecf20Sopenharmony_ci 3768c2ecf20Sopenharmony_cistatic const struct omap_lcd_config h3_lcd_config __initconst = { 3778c2ecf20Sopenharmony_ci .ctrl_name = "internal", 3788c2ecf20Sopenharmony_ci}; 3798c2ecf20Sopenharmony_ci 3808c2ecf20Sopenharmony_cistatic struct i2c_board_info __initdata h3_i2c_board_info[] = { 3818c2ecf20Sopenharmony_ci { 3828c2ecf20Sopenharmony_ci I2C_BOARD_INFO("tps65013", 0x48), 3838c2ecf20Sopenharmony_ci }, 3848c2ecf20Sopenharmony_ci { 3858c2ecf20Sopenharmony_ci I2C_BOARD_INFO("isp1301_omap", 0x2d), 3868c2ecf20Sopenharmony_ci }, 3878c2ecf20Sopenharmony_ci}; 3888c2ecf20Sopenharmony_ci 3898c2ecf20Sopenharmony_cistatic void __init h3_init(void) 3908c2ecf20Sopenharmony_ci{ 3918c2ecf20Sopenharmony_ci h3_init_smc91x(); 3928c2ecf20Sopenharmony_ci 3938c2ecf20Sopenharmony_ci /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped 3948c2ecf20Sopenharmony_ci * to address 0 by a dip switch), NAND on CS2B. The NAND driver will 3958c2ecf20Sopenharmony_ci * notice whether a NAND chip is enabled at probe time. 3968c2ecf20Sopenharmony_ci * 3978c2ecf20Sopenharmony_ci * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND 3988c2ecf20Sopenharmony_ci * (which on H2 may be 16bit) on CS3. Try detecting that in code here, 3998c2ecf20Sopenharmony_ci * to avoid probing every possible flash configuration... 4008c2ecf20Sopenharmony_ci */ 4018c2ecf20Sopenharmony_ci nor_resource.end = nor_resource.start = omap_cs3_phys(); 4028c2ecf20Sopenharmony_ci nor_resource.end += SZ_32M - 1; 4038c2ecf20Sopenharmony_ci 4048c2ecf20Sopenharmony_ci nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; 4058c2ecf20Sopenharmony_ci nand_resource.end += SZ_4K - 1; 4068c2ecf20Sopenharmony_ci BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0); 4078c2ecf20Sopenharmony_ci gpio_direction_input(H3_NAND_RB_GPIO_PIN); 4088c2ecf20Sopenharmony_ci 4098c2ecf20Sopenharmony_ci /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ 4108c2ecf20Sopenharmony_ci /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ 4118c2ecf20Sopenharmony_ci omap_cfg_reg(V2_1710_GPIO10); 4128c2ecf20Sopenharmony_ci 4138c2ecf20Sopenharmony_ci /* Mux pins for keypad */ 4148c2ecf20Sopenharmony_ci omap_cfg_reg(F18_1610_KBC0); 4158c2ecf20Sopenharmony_ci omap_cfg_reg(D20_1610_KBC1); 4168c2ecf20Sopenharmony_ci omap_cfg_reg(D19_1610_KBC2); 4178c2ecf20Sopenharmony_ci omap_cfg_reg(E18_1610_KBC3); 4188c2ecf20Sopenharmony_ci omap_cfg_reg(C21_1610_KBC4); 4198c2ecf20Sopenharmony_ci omap_cfg_reg(G18_1610_KBR0); 4208c2ecf20Sopenharmony_ci omap_cfg_reg(F19_1610_KBR1); 4218c2ecf20Sopenharmony_ci omap_cfg_reg(H14_1610_KBR2); 4228c2ecf20Sopenharmony_ci omap_cfg_reg(E20_1610_KBR3); 4238c2ecf20Sopenharmony_ci omap_cfg_reg(E19_1610_KBR4); 4248c2ecf20Sopenharmony_ci omap_cfg_reg(N19_1610_KBR5); 4258c2ecf20Sopenharmony_ci 4268c2ecf20Sopenharmony_ci /* GPIO based LEDs */ 4278c2ecf20Sopenharmony_ci omap_cfg_reg(P18_1610_GPIO3); 4288c2ecf20Sopenharmony_ci omap_cfg_reg(MPUIO4); 4298c2ecf20Sopenharmony_ci 4308c2ecf20Sopenharmony_ci smc91x_resources[1].start = gpio_to_irq(40); 4318c2ecf20Sopenharmony_ci smc91x_resources[1].end = gpio_to_irq(40); 4328c2ecf20Sopenharmony_ci platform_add_devices(devices, ARRAY_SIZE(devices)); 4338c2ecf20Sopenharmony_ci h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO); 4348c2ecf20Sopenharmony_ci spi_register_board_info(h3_spi_board_info, 4358c2ecf20Sopenharmony_ci ARRAY_SIZE(h3_spi_board_info)); 4368c2ecf20Sopenharmony_ci omap_serial_init(); 4378c2ecf20Sopenharmony_ci h3_i2c_board_info[1].irq = gpio_to_irq(14); 4388c2ecf20Sopenharmony_ci omap_register_i2c_bus(1, 100, h3_i2c_board_info, 4398c2ecf20Sopenharmony_ci ARRAY_SIZE(h3_i2c_board_info)); 4408c2ecf20Sopenharmony_ci omap1_usb_init(&h3_usb_config); 4418c2ecf20Sopenharmony_ci h3_mmc_init(); 4428c2ecf20Sopenharmony_ci 4438c2ecf20Sopenharmony_ci omapfb_set_lcd_config(&h3_lcd_config); 4448c2ecf20Sopenharmony_ci} 4458c2ecf20Sopenharmony_ci 4468c2ecf20Sopenharmony_ciMACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") 4478c2ecf20Sopenharmony_ci /* Maintainer: Texas Instruments, Inc. */ 4488c2ecf20Sopenharmony_ci .atag_offset = 0x100, 4498c2ecf20Sopenharmony_ci .map_io = omap16xx_map_io, 4508c2ecf20Sopenharmony_ci .init_early = omap1_init_early, 4518c2ecf20Sopenharmony_ci .init_irq = omap1_init_irq, 4528c2ecf20Sopenharmony_ci .handle_irq = omap1_handle_irq, 4538c2ecf20Sopenharmony_ci .init_machine = h3_init, 4548c2ecf20Sopenharmony_ci .init_late = omap1_init_late, 4558c2ecf20Sopenharmony_ci .init_time = omap1_timer_init, 4568c2ecf20Sopenharmony_ci .restart = omap1_restart, 4578c2ecf20Sopenharmony_ciMACHINE_END 458