18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * linux/arch/arm/mach-omap1/board-h2.c
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Board specific inits for OMAP-1610 H2
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Copyright (C) 2001 RidgeRun, Inc.
88c2ecf20Sopenharmony_ci * Author: Greg Lonnon <glonnon@ridgerun.com>
98c2ecf20Sopenharmony_ci *
108c2ecf20Sopenharmony_ci * Copyright (C) 2002 MontaVista Software, Inc.
118c2ecf20Sopenharmony_ci *
128c2ecf20Sopenharmony_ci * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
138c2ecf20Sopenharmony_ci * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
148c2ecf20Sopenharmony_ci *
158c2ecf20Sopenharmony_ci * H2 specific changes and cleanup
168c2ecf20Sopenharmony_ci * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
178c2ecf20Sopenharmony_ci */
188c2ecf20Sopenharmony_ci#include <linux/gpio.h>
198c2ecf20Sopenharmony_ci#include <linux/kernel.h>
208c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
218c2ecf20Sopenharmony_ci#include <linux/delay.h>
228c2ecf20Sopenharmony_ci#include <linux/i2c.h>
238c2ecf20Sopenharmony_ci#include <linux/mtd/mtd.h>
248c2ecf20Sopenharmony_ci#include <linux/mtd/platnand.h>
258c2ecf20Sopenharmony_ci#include <linux/mtd/physmap.h>
268c2ecf20Sopenharmony_ci#include <linux/input.h>
278c2ecf20Sopenharmony_ci#include <linux/mfd/tps65010.h>
288c2ecf20Sopenharmony_ci#include <linux/smc91x.h>
298c2ecf20Sopenharmony_ci#include <linux/omapfb.h>
308c2ecf20Sopenharmony_ci#include <linux/platform_data/gpio-omap.h>
318c2ecf20Sopenharmony_ci#include <linux/leds.h>
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci#include <asm/mach-types.h>
348c2ecf20Sopenharmony_ci#include <asm/mach/arch.h>
358c2ecf20Sopenharmony_ci#include <asm/mach/map.h>
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#include <mach/mux.h>
388c2ecf20Sopenharmony_ci#include <linux/omap-dma.h>
398c2ecf20Sopenharmony_ci#include <mach/tc.h>
408c2ecf20Sopenharmony_ci#include <linux/platform_data/keypad-omap.h>
418c2ecf20Sopenharmony_ci#include "flash.h"
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci#include <mach/hardware.h>
448c2ecf20Sopenharmony_ci#include <mach/usb.h>
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci#include "common.h"
478c2ecf20Sopenharmony_ci#include "board-h2.h"
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
508c2ecf20Sopenharmony_ci#define OMAP1610_ETHR_START		0x04000300
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_cistatic const unsigned int h2_keymap[] = {
538c2ecf20Sopenharmony_ci	KEY(0, 0, KEY_LEFT),
548c2ecf20Sopenharmony_ci	KEY(1, 0, KEY_RIGHT),
558c2ecf20Sopenharmony_ci	KEY(2, 0, KEY_3),
568c2ecf20Sopenharmony_ci	KEY(3, 0, KEY_F10),
578c2ecf20Sopenharmony_ci	KEY(4, 0, KEY_F5),
588c2ecf20Sopenharmony_ci	KEY(5, 0, KEY_9),
598c2ecf20Sopenharmony_ci	KEY(0, 1, KEY_DOWN),
608c2ecf20Sopenharmony_ci	KEY(1, 1, KEY_UP),
618c2ecf20Sopenharmony_ci	KEY(2, 1, KEY_2),
628c2ecf20Sopenharmony_ci	KEY(3, 1, KEY_F9),
638c2ecf20Sopenharmony_ci	KEY(4, 1, KEY_F7),
648c2ecf20Sopenharmony_ci	KEY(5, 1, KEY_0),
658c2ecf20Sopenharmony_ci	KEY(0, 2, KEY_ENTER),
668c2ecf20Sopenharmony_ci	KEY(1, 2, KEY_6),
678c2ecf20Sopenharmony_ci	KEY(2, 2, KEY_1),
688c2ecf20Sopenharmony_ci	KEY(3, 2, KEY_F2),
698c2ecf20Sopenharmony_ci	KEY(4, 2, KEY_F6),
708c2ecf20Sopenharmony_ci	KEY(5, 2, KEY_HOME),
718c2ecf20Sopenharmony_ci	KEY(0, 3, KEY_8),
728c2ecf20Sopenharmony_ci	KEY(1, 3, KEY_5),
738c2ecf20Sopenharmony_ci	KEY(2, 3, KEY_F12),
748c2ecf20Sopenharmony_ci	KEY(3, 3, KEY_F3),
758c2ecf20Sopenharmony_ci	KEY(4, 3, KEY_F8),
768c2ecf20Sopenharmony_ci	KEY(5, 3, KEY_END),
778c2ecf20Sopenharmony_ci	KEY(0, 4, KEY_7),
788c2ecf20Sopenharmony_ci	KEY(1, 4, KEY_4),
798c2ecf20Sopenharmony_ci	KEY(2, 4, KEY_F11),
808c2ecf20Sopenharmony_ci	KEY(3, 4, KEY_F1),
818c2ecf20Sopenharmony_ci	KEY(4, 4, KEY_F4),
828c2ecf20Sopenharmony_ci	KEY(5, 4, KEY_ESC),
838c2ecf20Sopenharmony_ci	KEY(0, 5, KEY_F13),
848c2ecf20Sopenharmony_ci	KEY(1, 5, KEY_F14),
858c2ecf20Sopenharmony_ci	KEY(2, 5, KEY_F15),
868c2ecf20Sopenharmony_ci	KEY(3, 5, KEY_F16),
878c2ecf20Sopenharmony_ci	KEY(4, 5, KEY_SLEEP),
888c2ecf20Sopenharmony_ci};
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_cistatic struct mtd_partition h2_nor_partitions[] = {
918c2ecf20Sopenharmony_ci	/* bootloader (U-Boot, etc) in first sector */
928c2ecf20Sopenharmony_ci	{
938c2ecf20Sopenharmony_ci	      .name		= "bootloader",
948c2ecf20Sopenharmony_ci	      .offset		= 0,
958c2ecf20Sopenharmony_ci	      .size		= SZ_128K,
968c2ecf20Sopenharmony_ci	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
978c2ecf20Sopenharmony_ci	},
988c2ecf20Sopenharmony_ci	/* bootloader params in the next sector */
998c2ecf20Sopenharmony_ci	{
1008c2ecf20Sopenharmony_ci	      .name		= "params",
1018c2ecf20Sopenharmony_ci	      .offset		= MTDPART_OFS_APPEND,
1028c2ecf20Sopenharmony_ci	      .size		= SZ_128K,
1038c2ecf20Sopenharmony_ci	      .mask_flags	= 0,
1048c2ecf20Sopenharmony_ci	},
1058c2ecf20Sopenharmony_ci	/* kernel */
1068c2ecf20Sopenharmony_ci	{
1078c2ecf20Sopenharmony_ci	      .name		= "kernel",
1088c2ecf20Sopenharmony_ci	      .offset		= MTDPART_OFS_APPEND,
1098c2ecf20Sopenharmony_ci	      .size		= SZ_2M,
1108c2ecf20Sopenharmony_ci	      .mask_flags	= 0
1118c2ecf20Sopenharmony_ci	},
1128c2ecf20Sopenharmony_ci	/* file system */
1138c2ecf20Sopenharmony_ci	{
1148c2ecf20Sopenharmony_ci	      .name		= "filesystem",
1158c2ecf20Sopenharmony_ci	      .offset		= MTDPART_OFS_APPEND,
1168c2ecf20Sopenharmony_ci	      .size		= MTDPART_SIZ_FULL,
1178c2ecf20Sopenharmony_ci	      .mask_flags	= 0
1188c2ecf20Sopenharmony_ci	}
1198c2ecf20Sopenharmony_ci};
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_cistatic struct physmap_flash_data h2_nor_data = {
1228c2ecf20Sopenharmony_ci	.width		= 2,
1238c2ecf20Sopenharmony_ci	.set_vpp	= omap1_set_vpp,
1248c2ecf20Sopenharmony_ci	.parts		= h2_nor_partitions,
1258c2ecf20Sopenharmony_ci	.nr_parts	= ARRAY_SIZE(h2_nor_partitions),
1268c2ecf20Sopenharmony_ci};
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_cistatic struct resource h2_nor_resource = {
1298c2ecf20Sopenharmony_ci	/* This is on CS3, wherever it's mapped */
1308c2ecf20Sopenharmony_ci	.flags		= IORESOURCE_MEM,
1318c2ecf20Sopenharmony_ci};
1328c2ecf20Sopenharmony_ci
1338c2ecf20Sopenharmony_cistatic struct platform_device h2_nor_device = {
1348c2ecf20Sopenharmony_ci	.name		= "physmap-flash",
1358c2ecf20Sopenharmony_ci	.id		= 0,
1368c2ecf20Sopenharmony_ci	.dev		= {
1378c2ecf20Sopenharmony_ci		.platform_data	= &h2_nor_data,
1388c2ecf20Sopenharmony_ci	},
1398c2ecf20Sopenharmony_ci	.num_resources	= 1,
1408c2ecf20Sopenharmony_ci	.resource	= &h2_nor_resource,
1418c2ecf20Sopenharmony_ci};
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_cistatic struct mtd_partition h2_nand_partitions[] = {
1448c2ecf20Sopenharmony_ci#if 0
1458c2ecf20Sopenharmony_ci	/* REVISIT:  enable these partitions if you make NAND BOOT
1468c2ecf20Sopenharmony_ci	 * work on your H2 (rev C or newer); published versions of
1478c2ecf20Sopenharmony_ci	 * x-load only support P2 and H3.
1488c2ecf20Sopenharmony_ci	 */
1498c2ecf20Sopenharmony_ci	{
1508c2ecf20Sopenharmony_ci		.name		= "xloader",
1518c2ecf20Sopenharmony_ci		.offset		= 0,
1528c2ecf20Sopenharmony_ci		.size		= 64 * 1024,
1538c2ecf20Sopenharmony_ci		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
1548c2ecf20Sopenharmony_ci	},
1558c2ecf20Sopenharmony_ci	{
1568c2ecf20Sopenharmony_ci		.name		= "bootloader",
1578c2ecf20Sopenharmony_ci		.offset		= MTDPART_OFS_APPEND,
1588c2ecf20Sopenharmony_ci		.size		= 256 * 1024,
1598c2ecf20Sopenharmony_ci		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
1608c2ecf20Sopenharmony_ci	},
1618c2ecf20Sopenharmony_ci	{
1628c2ecf20Sopenharmony_ci		.name		= "params",
1638c2ecf20Sopenharmony_ci		.offset		= MTDPART_OFS_APPEND,
1648c2ecf20Sopenharmony_ci		.size		= 192 * 1024,
1658c2ecf20Sopenharmony_ci	},
1668c2ecf20Sopenharmony_ci	{
1678c2ecf20Sopenharmony_ci		.name		= "kernel",
1688c2ecf20Sopenharmony_ci		.offset		= MTDPART_OFS_APPEND,
1698c2ecf20Sopenharmony_ci		.size		= 2 * SZ_1M,
1708c2ecf20Sopenharmony_ci	},
1718c2ecf20Sopenharmony_ci#endif
1728c2ecf20Sopenharmony_ci	{
1738c2ecf20Sopenharmony_ci		.name		= "filesystem",
1748c2ecf20Sopenharmony_ci		.size		= MTDPART_SIZ_FULL,
1758c2ecf20Sopenharmony_ci		.offset		= MTDPART_OFS_APPEND,
1768c2ecf20Sopenharmony_ci	},
1778c2ecf20Sopenharmony_ci};
1788c2ecf20Sopenharmony_ci
1798c2ecf20Sopenharmony_ci#define H2_NAND_RB_GPIO_PIN	62
1808c2ecf20Sopenharmony_ci
1818c2ecf20Sopenharmony_cistatic int h2_nand_dev_ready(struct nand_chip *chip)
1828c2ecf20Sopenharmony_ci{
1838c2ecf20Sopenharmony_ci	return gpio_get_value(H2_NAND_RB_GPIO_PIN);
1848c2ecf20Sopenharmony_ci}
1858c2ecf20Sopenharmony_ci
1868c2ecf20Sopenharmony_cistatic struct platform_nand_data h2_nand_platdata = {
1878c2ecf20Sopenharmony_ci	.chip	= {
1888c2ecf20Sopenharmony_ci		.nr_chips		= 1,
1898c2ecf20Sopenharmony_ci		.chip_offset		= 0,
1908c2ecf20Sopenharmony_ci		.nr_partitions		= ARRAY_SIZE(h2_nand_partitions),
1918c2ecf20Sopenharmony_ci		.partitions		= h2_nand_partitions,
1928c2ecf20Sopenharmony_ci		.options		= NAND_SAMSUNG_LP_OPTIONS,
1938c2ecf20Sopenharmony_ci	},
1948c2ecf20Sopenharmony_ci	.ctrl	= {
1958c2ecf20Sopenharmony_ci		.cmd_ctrl	= omap1_nand_cmd_ctl,
1968c2ecf20Sopenharmony_ci		.dev_ready	= h2_nand_dev_ready,
1978c2ecf20Sopenharmony_ci	},
1988c2ecf20Sopenharmony_ci};
1998c2ecf20Sopenharmony_ci
2008c2ecf20Sopenharmony_cistatic struct resource h2_nand_resource = {
2018c2ecf20Sopenharmony_ci	.flags		= IORESOURCE_MEM,
2028c2ecf20Sopenharmony_ci};
2038c2ecf20Sopenharmony_ci
2048c2ecf20Sopenharmony_cistatic struct platform_device h2_nand_device = {
2058c2ecf20Sopenharmony_ci	.name		= "gen_nand",
2068c2ecf20Sopenharmony_ci	.id		= 0,
2078c2ecf20Sopenharmony_ci	.dev		= {
2088c2ecf20Sopenharmony_ci		.platform_data	= &h2_nand_platdata,
2098c2ecf20Sopenharmony_ci	},
2108c2ecf20Sopenharmony_ci	.num_resources	= 1,
2118c2ecf20Sopenharmony_ci	.resource	= &h2_nand_resource,
2128c2ecf20Sopenharmony_ci};
2138c2ecf20Sopenharmony_ci
2148c2ecf20Sopenharmony_cistatic struct smc91x_platdata h2_smc91x_info = {
2158c2ecf20Sopenharmony_ci	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
2168c2ecf20Sopenharmony_ci	.leda	= RPC_LED_100_10,
2178c2ecf20Sopenharmony_ci	.ledb	= RPC_LED_TX_RX,
2188c2ecf20Sopenharmony_ci};
2198c2ecf20Sopenharmony_ci
2208c2ecf20Sopenharmony_cistatic struct resource h2_smc91x_resources[] = {
2218c2ecf20Sopenharmony_ci	[0] = {
2228c2ecf20Sopenharmony_ci		.start	= OMAP1610_ETHR_START,		/* Physical */
2238c2ecf20Sopenharmony_ci		.end	= OMAP1610_ETHR_START + 0xf,
2248c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_MEM,
2258c2ecf20Sopenharmony_ci	},
2268c2ecf20Sopenharmony_ci	[1] = {
2278c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2288c2ecf20Sopenharmony_ci	},
2298c2ecf20Sopenharmony_ci};
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_cistatic struct platform_device h2_smc91x_device = {
2328c2ecf20Sopenharmony_ci	.name		= "smc91x",
2338c2ecf20Sopenharmony_ci	.id		= 0,
2348c2ecf20Sopenharmony_ci	.dev	= {
2358c2ecf20Sopenharmony_ci		.platform_data	= &h2_smc91x_info,
2368c2ecf20Sopenharmony_ci	},
2378c2ecf20Sopenharmony_ci	.num_resources	= ARRAY_SIZE(h2_smc91x_resources),
2388c2ecf20Sopenharmony_ci	.resource	= h2_smc91x_resources,
2398c2ecf20Sopenharmony_ci};
2408c2ecf20Sopenharmony_ci
2418c2ecf20Sopenharmony_cistatic struct resource h2_kp_resources[] = {
2428c2ecf20Sopenharmony_ci	[0] = {
2438c2ecf20Sopenharmony_ci		.start	= INT_KEYBOARD,
2448c2ecf20Sopenharmony_ci		.end	= INT_KEYBOARD,
2458c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_IRQ,
2468c2ecf20Sopenharmony_ci	},
2478c2ecf20Sopenharmony_ci};
2488c2ecf20Sopenharmony_ci
2498c2ecf20Sopenharmony_cistatic const struct matrix_keymap_data h2_keymap_data = {
2508c2ecf20Sopenharmony_ci	.keymap		= h2_keymap,
2518c2ecf20Sopenharmony_ci	.keymap_size	= ARRAY_SIZE(h2_keymap),
2528c2ecf20Sopenharmony_ci};
2538c2ecf20Sopenharmony_ci
2548c2ecf20Sopenharmony_cistatic struct omap_kp_platform_data h2_kp_data = {
2558c2ecf20Sopenharmony_ci	.rows		= 8,
2568c2ecf20Sopenharmony_ci	.cols		= 8,
2578c2ecf20Sopenharmony_ci	.keymap_data	= &h2_keymap_data,
2588c2ecf20Sopenharmony_ci	.rep		= true,
2598c2ecf20Sopenharmony_ci	.delay		= 9,
2608c2ecf20Sopenharmony_ci	.dbounce	= true,
2618c2ecf20Sopenharmony_ci};
2628c2ecf20Sopenharmony_ci
2638c2ecf20Sopenharmony_cistatic struct platform_device h2_kp_device = {
2648c2ecf20Sopenharmony_ci	.name		= "omap-keypad",
2658c2ecf20Sopenharmony_ci	.id		= -1,
2668c2ecf20Sopenharmony_ci	.dev		= {
2678c2ecf20Sopenharmony_ci		.platform_data = &h2_kp_data,
2688c2ecf20Sopenharmony_ci	},
2698c2ecf20Sopenharmony_ci	.num_resources	= ARRAY_SIZE(h2_kp_resources),
2708c2ecf20Sopenharmony_ci	.resource	= h2_kp_resources,
2718c2ecf20Sopenharmony_ci};
2728c2ecf20Sopenharmony_ci
2738c2ecf20Sopenharmony_cistatic const struct gpio_led h2_gpio_led_pins[] = {
2748c2ecf20Sopenharmony_ci	{
2758c2ecf20Sopenharmony_ci		.name		= "h2:red",
2768c2ecf20Sopenharmony_ci		.default_trigger = "heartbeat",
2778c2ecf20Sopenharmony_ci		.gpio		= 3,
2788c2ecf20Sopenharmony_ci	},
2798c2ecf20Sopenharmony_ci	{
2808c2ecf20Sopenharmony_ci		.name		= "h2:green",
2818c2ecf20Sopenharmony_ci		.default_trigger = "cpu0",
2828c2ecf20Sopenharmony_ci		.gpio		= OMAP_MPUIO(4),
2838c2ecf20Sopenharmony_ci	},
2848c2ecf20Sopenharmony_ci};
2858c2ecf20Sopenharmony_ci
2868c2ecf20Sopenharmony_cistatic struct gpio_led_platform_data h2_gpio_led_data = {
2878c2ecf20Sopenharmony_ci	.leds		= h2_gpio_led_pins,
2888c2ecf20Sopenharmony_ci	.num_leds	= ARRAY_SIZE(h2_gpio_led_pins),
2898c2ecf20Sopenharmony_ci};
2908c2ecf20Sopenharmony_ci
2918c2ecf20Sopenharmony_cistatic struct platform_device h2_gpio_leds = {
2928c2ecf20Sopenharmony_ci	.name	= "leds-gpio",
2938c2ecf20Sopenharmony_ci	.id	= -1,
2948c2ecf20Sopenharmony_ci	.dev	= {
2958c2ecf20Sopenharmony_ci		.platform_data = &h2_gpio_led_data,
2968c2ecf20Sopenharmony_ci	},
2978c2ecf20Sopenharmony_ci};
2988c2ecf20Sopenharmony_ci
2998c2ecf20Sopenharmony_cistatic struct platform_device *h2_devices[] __initdata = {
3008c2ecf20Sopenharmony_ci	&h2_nor_device,
3018c2ecf20Sopenharmony_ci	&h2_nand_device,
3028c2ecf20Sopenharmony_ci	&h2_smc91x_device,
3038c2ecf20Sopenharmony_ci	&h2_kp_device,
3048c2ecf20Sopenharmony_ci	&h2_gpio_leds,
3058c2ecf20Sopenharmony_ci};
3068c2ecf20Sopenharmony_ci
3078c2ecf20Sopenharmony_cistatic void __init h2_init_smc91x(void)
3088c2ecf20Sopenharmony_ci{
3098c2ecf20Sopenharmony_ci	if (gpio_request(0, "SMC91x irq") < 0) {
3108c2ecf20Sopenharmony_ci		printk("Error requesting gpio 0 for smc91x irq\n");
3118c2ecf20Sopenharmony_ci		return;
3128c2ecf20Sopenharmony_ci	}
3138c2ecf20Sopenharmony_ci}
3148c2ecf20Sopenharmony_ci
3158c2ecf20Sopenharmony_cistatic int tps_setup(struct i2c_client *client, void *context)
3168c2ecf20Sopenharmony_ci{
3178c2ecf20Sopenharmony_ci	if (!IS_BUILTIN(CONFIG_TPS65010))
3188c2ecf20Sopenharmony_ci		return -ENOSYS;
3198c2ecf20Sopenharmony_ci
3208c2ecf20Sopenharmony_ci	tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
3218c2ecf20Sopenharmony_ci				TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
3228c2ecf20Sopenharmony_ci
3238c2ecf20Sopenharmony_ci	return 0;
3248c2ecf20Sopenharmony_ci}
3258c2ecf20Sopenharmony_ci
3268c2ecf20Sopenharmony_cistatic struct tps65010_board tps_board = {
3278c2ecf20Sopenharmony_ci	.base		= H2_TPS_GPIO_BASE,
3288c2ecf20Sopenharmony_ci	.outmask	= 0x0f,
3298c2ecf20Sopenharmony_ci	.setup		= tps_setup,
3308c2ecf20Sopenharmony_ci};
3318c2ecf20Sopenharmony_ci
3328c2ecf20Sopenharmony_cistatic struct i2c_board_info __initdata h2_i2c_board_info[] = {
3338c2ecf20Sopenharmony_ci	{
3348c2ecf20Sopenharmony_ci		I2C_BOARD_INFO("tps65010", 0x48),
3358c2ecf20Sopenharmony_ci		.platform_data	= &tps_board,
3368c2ecf20Sopenharmony_ci	}, {
3378c2ecf20Sopenharmony_ci		I2C_BOARD_INFO("isp1301_omap", 0x2d),
3388c2ecf20Sopenharmony_ci	},
3398c2ecf20Sopenharmony_ci};
3408c2ecf20Sopenharmony_ci
3418c2ecf20Sopenharmony_cistatic struct omap_usb_config h2_usb_config __initdata = {
3428c2ecf20Sopenharmony_ci	/* usb1 has a Mini-AB port and external isp1301 transceiver */
3438c2ecf20Sopenharmony_ci	.otg		= 2,
3448c2ecf20Sopenharmony_ci
3458c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_USB_OMAP)
3468c2ecf20Sopenharmony_ci	.hmc_mode	= 19,	/* 0:host(off) 1:dev|otg 2:disabled */
3478c2ecf20Sopenharmony_ci	/* .hmc_mode	= 21,*/	/* 0:host(off) 1:dev(loopback) 2:host(loopback) */
3488c2ecf20Sopenharmony_ci#elif	IS_ENABLED(CONFIG_USB_OHCI_HCD)
3498c2ecf20Sopenharmony_ci	/* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
3508c2ecf20Sopenharmony_ci	.hmc_mode	= 20,	/* 1:dev|otg(off) 1:host 2:disabled */
3518c2ecf20Sopenharmony_ci#endif
3528c2ecf20Sopenharmony_ci
3538c2ecf20Sopenharmony_ci	.pins[1]	= 3,
3548c2ecf20Sopenharmony_ci};
3558c2ecf20Sopenharmony_ci
3568c2ecf20Sopenharmony_cistatic const struct omap_lcd_config h2_lcd_config __initconst = {
3578c2ecf20Sopenharmony_ci	.ctrl_name	= "internal",
3588c2ecf20Sopenharmony_ci};
3598c2ecf20Sopenharmony_ci
3608c2ecf20Sopenharmony_cistatic void __init h2_init(void)
3618c2ecf20Sopenharmony_ci{
3628c2ecf20Sopenharmony_ci	h2_init_smc91x();
3638c2ecf20Sopenharmony_ci
3648c2ecf20Sopenharmony_ci	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
3658c2ecf20Sopenharmony_ci	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
3668c2ecf20Sopenharmony_ci	 * notice whether a NAND chip is enabled at probe time.
3678c2ecf20Sopenharmony_ci	 *
3688c2ecf20Sopenharmony_ci	 * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
3698c2ecf20Sopenharmony_ci	 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3.  Try
3708c2ecf20Sopenharmony_ci	 * detecting that in code here, to avoid probing every possible flash
3718c2ecf20Sopenharmony_ci	 * configuration...
3728c2ecf20Sopenharmony_ci	 */
3738c2ecf20Sopenharmony_ci	h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
3748c2ecf20Sopenharmony_ci	h2_nor_resource.end += SZ_32M - 1;
3758c2ecf20Sopenharmony_ci
3768c2ecf20Sopenharmony_ci	h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
3778c2ecf20Sopenharmony_ci	h2_nand_resource.end += SZ_4K - 1;
3788c2ecf20Sopenharmony_ci	BUG_ON(gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0);
3798c2ecf20Sopenharmony_ci	gpio_direction_input(H2_NAND_RB_GPIO_PIN);
3808c2ecf20Sopenharmony_ci
3818c2ecf20Sopenharmony_ci	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
3828c2ecf20Sopenharmony_ci	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
3838c2ecf20Sopenharmony_ci
3848c2ecf20Sopenharmony_ci	/* MMC:  card detect and WP */
3858c2ecf20Sopenharmony_ci	/* omap_cfg_reg(U19_ARMIO1); */		/* CD */
3868c2ecf20Sopenharmony_ci	omap_cfg_reg(BALLOUT_V8_ARMIO3);	/* WP */
3878c2ecf20Sopenharmony_ci
3888c2ecf20Sopenharmony_ci	/* Mux pins for keypad */
3898c2ecf20Sopenharmony_ci	omap_cfg_reg(F18_1610_KBC0);
3908c2ecf20Sopenharmony_ci	omap_cfg_reg(D20_1610_KBC1);
3918c2ecf20Sopenharmony_ci	omap_cfg_reg(D19_1610_KBC2);
3928c2ecf20Sopenharmony_ci	omap_cfg_reg(E18_1610_KBC3);
3938c2ecf20Sopenharmony_ci	omap_cfg_reg(C21_1610_KBC4);
3948c2ecf20Sopenharmony_ci	omap_cfg_reg(G18_1610_KBR0);
3958c2ecf20Sopenharmony_ci	omap_cfg_reg(F19_1610_KBR1);
3968c2ecf20Sopenharmony_ci	omap_cfg_reg(H14_1610_KBR2);
3978c2ecf20Sopenharmony_ci	omap_cfg_reg(E20_1610_KBR3);
3988c2ecf20Sopenharmony_ci	omap_cfg_reg(E19_1610_KBR4);
3998c2ecf20Sopenharmony_ci	omap_cfg_reg(N19_1610_KBR5);
4008c2ecf20Sopenharmony_ci
4018c2ecf20Sopenharmony_ci	/* GPIO based LEDs */
4028c2ecf20Sopenharmony_ci	omap_cfg_reg(P18_1610_GPIO3);
4038c2ecf20Sopenharmony_ci	omap_cfg_reg(MPUIO4);
4048c2ecf20Sopenharmony_ci
4058c2ecf20Sopenharmony_ci	h2_smc91x_resources[1].start = gpio_to_irq(0);
4068c2ecf20Sopenharmony_ci	h2_smc91x_resources[1].end = gpio_to_irq(0);
4078c2ecf20Sopenharmony_ci	platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
4088c2ecf20Sopenharmony_ci	omap_serial_init();
4098c2ecf20Sopenharmony_ci	h2_i2c_board_info[0].irq = gpio_to_irq(58);
4108c2ecf20Sopenharmony_ci	h2_i2c_board_info[1].irq = gpio_to_irq(2);
4118c2ecf20Sopenharmony_ci	omap_register_i2c_bus(1, 100, h2_i2c_board_info,
4128c2ecf20Sopenharmony_ci			      ARRAY_SIZE(h2_i2c_board_info));
4138c2ecf20Sopenharmony_ci	omap1_usb_init(&h2_usb_config);
4148c2ecf20Sopenharmony_ci	h2_mmc_init();
4158c2ecf20Sopenharmony_ci
4168c2ecf20Sopenharmony_ci	omapfb_set_lcd_config(&h2_lcd_config);
4178c2ecf20Sopenharmony_ci}
4188c2ecf20Sopenharmony_ci
4198c2ecf20Sopenharmony_ciMACHINE_START(OMAP_H2, "TI-H2")
4208c2ecf20Sopenharmony_ci	/* Maintainer: Imre Deak <imre.deak@nokia.com> */
4218c2ecf20Sopenharmony_ci	.atag_offset	= 0x100,
4228c2ecf20Sopenharmony_ci	.map_io		= omap16xx_map_io,
4238c2ecf20Sopenharmony_ci	.init_early     = omap1_init_early,
4248c2ecf20Sopenharmony_ci	.init_irq	= omap1_init_irq,
4258c2ecf20Sopenharmony_ci	.handle_irq	= omap1_handle_irq,
4268c2ecf20Sopenharmony_ci	.init_machine	= h2_init,
4278c2ecf20Sopenharmony_ci	.init_late	= omap1_init_late,
4288c2ecf20Sopenharmony_ci	.init_time	= omap1_timer_init,
4298c2ecf20Sopenharmony_ci	.restart	= omap1_restart,
4308c2ecf20Sopenharmony_ciMACHINE_END
431