18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * linux/arch/arm/mach-omap1/board-fsample.c
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Modified from board-perseus2.c
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
88c2ecf20Sopenharmony_ci * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci#include <linux/gpio.h>
118c2ecf20Sopenharmony_ci#include <linux/kernel.h>
128c2ecf20Sopenharmony_ci#include <linux/init.h>
138c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
148c2ecf20Sopenharmony_ci#include <linux/delay.h>
158c2ecf20Sopenharmony_ci#include <linux/mtd/mtd.h>
168c2ecf20Sopenharmony_ci#include <linux/mtd/platnand.h>
178c2ecf20Sopenharmony_ci#include <linux/mtd/physmap.h>
188c2ecf20Sopenharmony_ci#include <linux/input.h>
198c2ecf20Sopenharmony_ci#include <linux/smc91x.h>
208c2ecf20Sopenharmony_ci#include <linux/omapfb.h>
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci#include <asm/mach-types.h>
238c2ecf20Sopenharmony_ci#include <asm/mach/arch.h>
248c2ecf20Sopenharmony_ci#include <asm/mach/map.h>
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#include <mach/tc.h>
278c2ecf20Sopenharmony_ci#include <mach/mux.h>
288c2ecf20Sopenharmony_ci#include "flash.h"
298c2ecf20Sopenharmony_ci#include <linux/platform_data/keypad-omap.h>
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci#include <mach/hardware.h>
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci#include "iomap.h"
348c2ecf20Sopenharmony_ci#include "common.h"
358c2ecf20Sopenharmony_ci#include "fpga.h"
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci/* fsample is pretty close to p2-sample */
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci#define fsample_cpld_read(reg) __raw_readb(reg)
408c2ecf20Sopenharmony_ci#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BASE    0xE8100000
438c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_SIZE    SZ_4K
448c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_START   0x05080000
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_REG_A   (FSAMPLE_CPLD_BASE + 0x00)
478c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_SWITCH  (FSAMPLE_CPLD_BASE + 0x02)
488c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_UART    (FSAMPLE_CPLD_BASE + 0x02)
498c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_REG_B   (FSAMPLE_CPLD_BASE + 0x04)
508c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
518c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_BT_RESET         0
548c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_LCD_RESET        1
558c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_CAM_PWDN         2
568c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE   3
578c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_SD_MMC_EN        4
588c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_aGPS_PWREN       5
598c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_BACKLIGHT        6
608c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET    7
618c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N    8
628c2ecf20Sopenharmony_ci#define FSAMPLE_CPLD_BIT_OTG_RESET        9
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci#define fsample_cpld_set(bit) \
658c2ecf20Sopenharmony_ci    fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci#define fsample_cpld_clear(bit) \
688c2ecf20Sopenharmony_ci    fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_cistatic const unsigned int fsample_keymap[] = {
718c2ecf20Sopenharmony_ci	KEY(0, 0, KEY_UP),
728c2ecf20Sopenharmony_ci	KEY(1, 0, KEY_RIGHT),
738c2ecf20Sopenharmony_ci	KEY(2, 0, KEY_LEFT),
748c2ecf20Sopenharmony_ci	KEY(3, 0, KEY_DOWN),
758c2ecf20Sopenharmony_ci	KEY(4, 0, KEY_ENTER),
768c2ecf20Sopenharmony_ci	KEY(0, 1, KEY_F10),
778c2ecf20Sopenharmony_ci	KEY(1, 1, KEY_SEND),
788c2ecf20Sopenharmony_ci	KEY(2, 1, KEY_END),
798c2ecf20Sopenharmony_ci	KEY(3, 1, KEY_VOLUMEDOWN),
808c2ecf20Sopenharmony_ci	KEY(4, 1, KEY_VOLUMEUP),
818c2ecf20Sopenharmony_ci	KEY(5, 1, KEY_RECORD),
828c2ecf20Sopenharmony_ci	KEY(0, 2, KEY_F9),
838c2ecf20Sopenharmony_ci	KEY(1, 2, KEY_3),
848c2ecf20Sopenharmony_ci	KEY(2, 2, KEY_6),
858c2ecf20Sopenharmony_ci	KEY(3, 2, KEY_9),
868c2ecf20Sopenharmony_ci	KEY(4, 2, KEY_KPDOT),
878c2ecf20Sopenharmony_ci	KEY(0, 3, KEY_BACK),
888c2ecf20Sopenharmony_ci	KEY(1, 3, KEY_2),
898c2ecf20Sopenharmony_ci	KEY(2, 3, KEY_5),
908c2ecf20Sopenharmony_ci	KEY(3, 3, KEY_8),
918c2ecf20Sopenharmony_ci	KEY(4, 3, KEY_0),
928c2ecf20Sopenharmony_ci	KEY(5, 3, KEY_KPSLASH),
938c2ecf20Sopenharmony_ci	KEY(0, 4, KEY_HOME),
948c2ecf20Sopenharmony_ci	KEY(1, 4, KEY_1),
958c2ecf20Sopenharmony_ci	KEY(2, 4, KEY_4),
968c2ecf20Sopenharmony_ci	KEY(3, 4, KEY_7),
978c2ecf20Sopenharmony_ci	KEY(4, 4, KEY_KPASTERISK),
988c2ecf20Sopenharmony_ci	KEY(5, 4, KEY_POWER),
998c2ecf20Sopenharmony_ci};
1008c2ecf20Sopenharmony_ci
1018c2ecf20Sopenharmony_cistatic struct smc91x_platdata smc91x_info = {
1028c2ecf20Sopenharmony_ci	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
1038c2ecf20Sopenharmony_ci	.leda	= RPC_LED_100_10,
1048c2ecf20Sopenharmony_ci	.ledb	= RPC_LED_TX_RX,
1058c2ecf20Sopenharmony_ci};
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_cistatic struct resource smc91x_resources[] = {
1088c2ecf20Sopenharmony_ci	[0] = {
1098c2ecf20Sopenharmony_ci		.start	= H2P2_DBG_FPGA_ETHR_START,	/* Physical */
1108c2ecf20Sopenharmony_ci		.end	= H2P2_DBG_FPGA_ETHR_START + 0xf,
1118c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_MEM,
1128c2ecf20Sopenharmony_ci	},
1138c2ecf20Sopenharmony_ci	[1] = {
1148c2ecf20Sopenharmony_ci		.start	= INT_7XX_MPU_EXT_NIRQ,
1158c2ecf20Sopenharmony_ci		.end	= 0,
1168c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
1178c2ecf20Sopenharmony_ci	},
1188c2ecf20Sopenharmony_ci};
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_cistatic void __init fsample_init_smc91x(void)
1218c2ecf20Sopenharmony_ci{
1228c2ecf20Sopenharmony_ci	__raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
1238c2ecf20Sopenharmony_ci	mdelay(50);
1248c2ecf20Sopenharmony_ci	__raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
1258c2ecf20Sopenharmony_ci		   H2P2_DBG_FPGA_LAN_RESET);
1268c2ecf20Sopenharmony_ci	mdelay(50);
1278c2ecf20Sopenharmony_ci}
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_cistatic struct mtd_partition nor_partitions[] = {
1308c2ecf20Sopenharmony_ci	/* bootloader (U-Boot, etc) in first sector */
1318c2ecf20Sopenharmony_ci	{
1328c2ecf20Sopenharmony_ci	      .name		= "bootloader",
1338c2ecf20Sopenharmony_ci	      .offset		= 0,
1348c2ecf20Sopenharmony_ci	      .size		= SZ_128K,
1358c2ecf20Sopenharmony_ci	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
1368c2ecf20Sopenharmony_ci	},
1378c2ecf20Sopenharmony_ci	/* bootloader params in the next sector */
1388c2ecf20Sopenharmony_ci	{
1398c2ecf20Sopenharmony_ci	      .name		= "params",
1408c2ecf20Sopenharmony_ci	      .offset		= MTDPART_OFS_APPEND,
1418c2ecf20Sopenharmony_ci	      .size		= SZ_128K,
1428c2ecf20Sopenharmony_ci	      .mask_flags	= 0,
1438c2ecf20Sopenharmony_ci	},
1448c2ecf20Sopenharmony_ci	/* kernel */
1458c2ecf20Sopenharmony_ci	{
1468c2ecf20Sopenharmony_ci	      .name		= "kernel",
1478c2ecf20Sopenharmony_ci	      .offset		= MTDPART_OFS_APPEND,
1488c2ecf20Sopenharmony_ci	      .size		= SZ_2M,
1498c2ecf20Sopenharmony_ci	      .mask_flags	= 0
1508c2ecf20Sopenharmony_ci	},
1518c2ecf20Sopenharmony_ci	/* rest of flash is a file system */
1528c2ecf20Sopenharmony_ci	{
1538c2ecf20Sopenharmony_ci	      .name		= "rootfs",
1548c2ecf20Sopenharmony_ci	      .offset		= MTDPART_OFS_APPEND,
1558c2ecf20Sopenharmony_ci	      .size		= MTDPART_SIZ_FULL,
1568c2ecf20Sopenharmony_ci	      .mask_flags	= 0
1578c2ecf20Sopenharmony_ci	},
1588c2ecf20Sopenharmony_ci};
1598c2ecf20Sopenharmony_ci
1608c2ecf20Sopenharmony_cistatic struct physmap_flash_data nor_data = {
1618c2ecf20Sopenharmony_ci	.width		= 2,
1628c2ecf20Sopenharmony_ci	.set_vpp	= omap1_set_vpp,
1638c2ecf20Sopenharmony_ci	.parts		= nor_partitions,
1648c2ecf20Sopenharmony_ci	.nr_parts	= ARRAY_SIZE(nor_partitions),
1658c2ecf20Sopenharmony_ci};
1668c2ecf20Sopenharmony_ci
1678c2ecf20Sopenharmony_cistatic struct resource nor_resource = {
1688c2ecf20Sopenharmony_ci	.start		= OMAP_CS0_PHYS,
1698c2ecf20Sopenharmony_ci	.end		= OMAP_CS0_PHYS + SZ_32M - 1,
1708c2ecf20Sopenharmony_ci	.flags		= IORESOURCE_MEM,
1718c2ecf20Sopenharmony_ci};
1728c2ecf20Sopenharmony_ci
1738c2ecf20Sopenharmony_cistatic struct platform_device nor_device = {
1748c2ecf20Sopenharmony_ci	.name		= "physmap-flash",
1758c2ecf20Sopenharmony_ci	.id		= 0,
1768c2ecf20Sopenharmony_ci	.dev		= {
1778c2ecf20Sopenharmony_ci		.platform_data	= &nor_data,
1788c2ecf20Sopenharmony_ci	},
1798c2ecf20Sopenharmony_ci	.num_resources	= 1,
1808c2ecf20Sopenharmony_ci	.resource	= &nor_resource,
1818c2ecf20Sopenharmony_ci};
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_ci#define FSAMPLE_NAND_RB_GPIO_PIN	62
1848c2ecf20Sopenharmony_ci
1858c2ecf20Sopenharmony_cistatic int nand_dev_ready(struct nand_chip *chip)
1868c2ecf20Sopenharmony_ci{
1878c2ecf20Sopenharmony_ci	return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
1888c2ecf20Sopenharmony_ci}
1898c2ecf20Sopenharmony_ci
1908c2ecf20Sopenharmony_cistatic struct platform_nand_data nand_data = {
1918c2ecf20Sopenharmony_ci	.chip	= {
1928c2ecf20Sopenharmony_ci		.nr_chips		= 1,
1938c2ecf20Sopenharmony_ci		.chip_offset		= 0,
1948c2ecf20Sopenharmony_ci		.options		= NAND_SAMSUNG_LP_OPTIONS,
1958c2ecf20Sopenharmony_ci	},
1968c2ecf20Sopenharmony_ci	.ctrl	= {
1978c2ecf20Sopenharmony_ci		.cmd_ctrl	= omap1_nand_cmd_ctl,
1988c2ecf20Sopenharmony_ci		.dev_ready	= nand_dev_ready,
1998c2ecf20Sopenharmony_ci	},
2008c2ecf20Sopenharmony_ci};
2018c2ecf20Sopenharmony_ci
2028c2ecf20Sopenharmony_cistatic struct resource nand_resource = {
2038c2ecf20Sopenharmony_ci	.start		= OMAP_CS3_PHYS,
2048c2ecf20Sopenharmony_ci	.end		= OMAP_CS3_PHYS + SZ_4K - 1,
2058c2ecf20Sopenharmony_ci	.flags		= IORESOURCE_MEM,
2068c2ecf20Sopenharmony_ci};
2078c2ecf20Sopenharmony_ci
2088c2ecf20Sopenharmony_cistatic struct platform_device nand_device = {
2098c2ecf20Sopenharmony_ci	.name		= "gen_nand",
2108c2ecf20Sopenharmony_ci	.id		= 0,
2118c2ecf20Sopenharmony_ci	.dev		= {
2128c2ecf20Sopenharmony_ci		.platform_data	= &nand_data,
2138c2ecf20Sopenharmony_ci	},
2148c2ecf20Sopenharmony_ci	.num_resources	= 1,
2158c2ecf20Sopenharmony_ci	.resource	= &nand_resource,
2168c2ecf20Sopenharmony_ci};
2178c2ecf20Sopenharmony_ci
2188c2ecf20Sopenharmony_cistatic struct platform_device smc91x_device = {
2198c2ecf20Sopenharmony_ci	.name		= "smc91x",
2208c2ecf20Sopenharmony_ci	.id		= 0,
2218c2ecf20Sopenharmony_ci	.dev	= {
2228c2ecf20Sopenharmony_ci		.platform_data	= &smc91x_info,
2238c2ecf20Sopenharmony_ci	},
2248c2ecf20Sopenharmony_ci	.num_resources	= ARRAY_SIZE(smc91x_resources),
2258c2ecf20Sopenharmony_ci	.resource	= smc91x_resources,
2268c2ecf20Sopenharmony_ci};
2278c2ecf20Sopenharmony_ci
2288c2ecf20Sopenharmony_cistatic struct resource kp_resources[] = {
2298c2ecf20Sopenharmony_ci	[0] = {
2308c2ecf20Sopenharmony_ci		.start	= INT_7XX_MPUIO_KEYPAD,
2318c2ecf20Sopenharmony_ci		.end	= INT_7XX_MPUIO_KEYPAD,
2328c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_IRQ,
2338c2ecf20Sopenharmony_ci	},
2348c2ecf20Sopenharmony_ci};
2358c2ecf20Sopenharmony_ci
2368c2ecf20Sopenharmony_cistatic const struct matrix_keymap_data fsample_keymap_data = {
2378c2ecf20Sopenharmony_ci	.keymap		= fsample_keymap,
2388c2ecf20Sopenharmony_ci	.keymap_size	= ARRAY_SIZE(fsample_keymap),
2398c2ecf20Sopenharmony_ci};
2408c2ecf20Sopenharmony_ci
2418c2ecf20Sopenharmony_cistatic struct omap_kp_platform_data kp_data = {
2428c2ecf20Sopenharmony_ci	.rows		= 8,
2438c2ecf20Sopenharmony_ci	.cols		= 8,
2448c2ecf20Sopenharmony_ci	.keymap_data	= &fsample_keymap_data,
2458c2ecf20Sopenharmony_ci	.delay		= 4,
2468c2ecf20Sopenharmony_ci};
2478c2ecf20Sopenharmony_ci
2488c2ecf20Sopenharmony_cistatic struct platform_device kp_device = {
2498c2ecf20Sopenharmony_ci	.name		= "omap-keypad",
2508c2ecf20Sopenharmony_ci	.id		= -1,
2518c2ecf20Sopenharmony_ci	.dev		= {
2528c2ecf20Sopenharmony_ci		.platform_data = &kp_data,
2538c2ecf20Sopenharmony_ci	},
2548c2ecf20Sopenharmony_ci	.num_resources	= ARRAY_SIZE(kp_resources),
2558c2ecf20Sopenharmony_ci	.resource	= kp_resources,
2568c2ecf20Sopenharmony_ci};
2578c2ecf20Sopenharmony_ci
2588c2ecf20Sopenharmony_cistatic struct platform_device *devices[] __initdata = {
2598c2ecf20Sopenharmony_ci	&nor_device,
2608c2ecf20Sopenharmony_ci	&nand_device,
2618c2ecf20Sopenharmony_ci	&smc91x_device,
2628c2ecf20Sopenharmony_ci	&kp_device,
2638c2ecf20Sopenharmony_ci};
2648c2ecf20Sopenharmony_ci
2658c2ecf20Sopenharmony_cistatic const struct omap_lcd_config fsample_lcd_config = {
2668c2ecf20Sopenharmony_ci	.ctrl_name	= "internal",
2678c2ecf20Sopenharmony_ci};
2688c2ecf20Sopenharmony_ci
2698c2ecf20Sopenharmony_cistatic void __init omap_fsample_init(void)
2708c2ecf20Sopenharmony_ci{
2718c2ecf20Sopenharmony_ci	/* Early, board-dependent init */
2728c2ecf20Sopenharmony_ci
2738c2ecf20Sopenharmony_ci	/*
2748c2ecf20Sopenharmony_ci	 * Hold GSM Reset until needed
2758c2ecf20Sopenharmony_ci	 */
2768c2ecf20Sopenharmony_ci	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
2778c2ecf20Sopenharmony_ci
2788c2ecf20Sopenharmony_ci	/*
2798c2ecf20Sopenharmony_ci	 * UARTs -> done automagically by 8250 driver
2808c2ecf20Sopenharmony_ci	 */
2818c2ecf20Sopenharmony_ci
2828c2ecf20Sopenharmony_ci	/*
2838c2ecf20Sopenharmony_ci	 * CSx timings, GPIO Mux ... setup
2848c2ecf20Sopenharmony_ci	 */
2858c2ecf20Sopenharmony_ci
2868c2ecf20Sopenharmony_ci	/* Flash: CS0 timings setup */
2878c2ecf20Sopenharmony_ci	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
2888c2ecf20Sopenharmony_ci	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci	/*
2918c2ecf20Sopenharmony_ci	 * Ethernet support through the debug board
2928c2ecf20Sopenharmony_ci	 * CS1 timings setup
2938c2ecf20Sopenharmony_ci	 */
2948c2ecf20Sopenharmony_ci	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
2958c2ecf20Sopenharmony_ci	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
2968c2ecf20Sopenharmony_ci
2978c2ecf20Sopenharmony_ci	/*
2988c2ecf20Sopenharmony_ci	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
2998c2ecf20Sopenharmony_ci	 * It is used as the Ethernet controller interrupt
3008c2ecf20Sopenharmony_ci	 */
3018c2ecf20Sopenharmony_ci	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
3028c2ecf20Sopenharmony_ci			OMAP7XX_IO_CONF_9);
3038c2ecf20Sopenharmony_ci
3048c2ecf20Sopenharmony_ci	fsample_init_smc91x();
3058c2ecf20Sopenharmony_ci
3068c2ecf20Sopenharmony_ci	BUG_ON(gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0);
3078c2ecf20Sopenharmony_ci	gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
3088c2ecf20Sopenharmony_ci
3098c2ecf20Sopenharmony_ci	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
3108c2ecf20Sopenharmony_ci	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
3118c2ecf20Sopenharmony_ci
3128c2ecf20Sopenharmony_ci	/* Mux pins for keypad */
3138c2ecf20Sopenharmony_ci	omap_cfg_reg(E2_7XX_KBR0);
3148c2ecf20Sopenharmony_ci	omap_cfg_reg(J7_7XX_KBR1);
3158c2ecf20Sopenharmony_ci	omap_cfg_reg(E1_7XX_KBR2);
3168c2ecf20Sopenharmony_ci	omap_cfg_reg(F3_7XX_KBR3);
3178c2ecf20Sopenharmony_ci	omap_cfg_reg(D2_7XX_KBR4);
3188c2ecf20Sopenharmony_ci	omap_cfg_reg(C2_7XX_KBC0);
3198c2ecf20Sopenharmony_ci	omap_cfg_reg(D3_7XX_KBC1);
3208c2ecf20Sopenharmony_ci	omap_cfg_reg(E4_7XX_KBC2);
3218c2ecf20Sopenharmony_ci	omap_cfg_reg(F4_7XX_KBC3);
3228c2ecf20Sopenharmony_ci	omap_cfg_reg(E3_7XX_KBC4);
3238c2ecf20Sopenharmony_ci
3248c2ecf20Sopenharmony_ci	platform_add_devices(devices, ARRAY_SIZE(devices));
3258c2ecf20Sopenharmony_ci
3268c2ecf20Sopenharmony_ci	omap_serial_init();
3278c2ecf20Sopenharmony_ci	omap_register_i2c_bus(1, 100, NULL, 0);
3288c2ecf20Sopenharmony_ci
3298c2ecf20Sopenharmony_ci	omapfb_set_lcd_config(&fsample_lcd_config);
3308c2ecf20Sopenharmony_ci}
3318c2ecf20Sopenharmony_ci
3328c2ecf20Sopenharmony_ci/* Only FPGA needs to be mapped here. All others are done with ioremap */
3338c2ecf20Sopenharmony_cistatic struct map_desc omap_fsample_io_desc[] __initdata = {
3348c2ecf20Sopenharmony_ci	{
3358c2ecf20Sopenharmony_ci		.virtual	= H2P2_DBG_FPGA_BASE,
3368c2ecf20Sopenharmony_ci		.pfn		= __phys_to_pfn(H2P2_DBG_FPGA_START),
3378c2ecf20Sopenharmony_ci		.length		= H2P2_DBG_FPGA_SIZE,
3388c2ecf20Sopenharmony_ci		.type		= MT_DEVICE
3398c2ecf20Sopenharmony_ci	},
3408c2ecf20Sopenharmony_ci	{
3418c2ecf20Sopenharmony_ci		.virtual	= FSAMPLE_CPLD_BASE,
3428c2ecf20Sopenharmony_ci		.pfn		= __phys_to_pfn(FSAMPLE_CPLD_START),
3438c2ecf20Sopenharmony_ci		.length		= FSAMPLE_CPLD_SIZE,
3448c2ecf20Sopenharmony_ci		.type		= MT_DEVICE
3458c2ecf20Sopenharmony_ci	}
3468c2ecf20Sopenharmony_ci};
3478c2ecf20Sopenharmony_ci
3488c2ecf20Sopenharmony_cistatic void __init omap_fsample_map_io(void)
3498c2ecf20Sopenharmony_ci{
3508c2ecf20Sopenharmony_ci	omap15xx_map_io();
3518c2ecf20Sopenharmony_ci	iotable_init(omap_fsample_io_desc,
3528c2ecf20Sopenharmony_ci		     ARRAY_SIZE(omap_fsample_io_desc));
3538c2ecf20Sopenharmony_ci}
3548c2ecf20Sopenharmony_ci
3558c2ecf20Sopenharmony_ciMACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
3568c2ecf20Sopenharmony_ci/* Maintainer: Brian Swetland <swetland@google.com> */
3578c2ecf20Sopenharmony_ci	.atag_offset	= 0x100,
3588c2ecf20Sopenharmony_ci	.map_io		= omap_fsample_map_io,
3598c2ecf20Sopenharmony_ci	.init_early	= omap1_init_early,
3608c2ecf20Sopenharmony_ci	.init_irq	= omap1_init_irq,
3618c2ecf20Sopenharmony_ci	.handle_irq	= omap1_handle_irq,
3628c2ecf20Sopenharmony_ci	.init_machine	= omap_fsample_init,
3638c2ecf20Sopenharmony_ci	.init_late	= omap1_init_late,
3648c2ecf20Sopenharmony_ci	.init_time	= omap1_timer_init,
3658c2ecf20Sopenharmony_ci	.restart	= omap1_restart,
3668c2ecf20Sopenharmony_ciMACHINE_END
367