18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * SMP support: Entry point for secondary CPUs of Marvell EBU 38c2ecf20Sopenharmony_ci * Cortex-A9 based SOCs (Armada 375 and Armada 38x). 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2014 Marvell 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Gregory CLEMENT <gregory.clement@free-electrons.com> 88c2ecf20Sopenharmony_ci * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 118c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without any 128c2ecf20Sopenharmony_ci * warranty of any kind, whether express or implied. 138c2ecf20Sopenharmony_ci */ 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#include <linux/linkage.h> 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci#include <asm/assembler.h> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciENTRY(mvebu_cortex_a9_secondary_startup) 208c2ecf20Sopenharmony_ciARM_BE8(setend be) 218c2ecf20Sopenharmony_ci bl armada_38x_scu_power_up 228c2ecf20Sopenharmony_ci b secondary_startup 238c2ecf20Sopenharmony_ciENDPROC(mvebu_cortex_a9_secondary_startup) 24