18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Core functions for Marvell System On Chip 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Copyright (C) 2012 Marvell 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Lior Amsalem <alior@marvell.com> 78c2ecf20Sopenharmony_ci * Gregory CLEMENT <gregory.clement@free-electrons.com> 88c2ecf20Sopenharmony_ci * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 118c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without any 128c2ecf20Sopenharmony_ci * warranty of any kind, whether express or implied. 138c2ecf20Sopenharmony_ci */ 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#ifndef __ARCH_MVEBU_COMMON_H 168c2ecf20Sopenharmony_ci#define __ARCH_MVEBU_COMMON_H 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci#include <linux/reboot.h> 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_civoid mvebu_restart(enum reboot_mode mode, const char *cmd); 218c2ecf20Sopenharmony_ciint mvebu_cpu_reset_deassert(int cpu); 228c2ecf20Sopenharmony_civoid mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr); 238c2ecf20Sopenharmony_civoid mvebu_system_controller_set_cpu_boot_addr(void *boot_addr); 248c2ecf20Sopenharmony_ciint mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev); 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_civoid __iomem *mvebu_get_scu_base(void); 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ciint mvebu_pm_suspend_init(void (*board_pm_enter)(void __iomem *sdram_reg, 298c2ecf20Sopenharmony_ci u32 srcmd)); 308c2ecf20Sopenharmony_ci#endif 31