18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * Buffalo WXL (Terastation Duo) Setup routines
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * sebastien requiem <sebastien@requiem.fr>
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public
98c2ecf20Sopenharmony_ci * License version 2.  This program is licensed "as is" without any
108c2ecf20Sopenharmony_ci * warranty of any kind, whether express or implied.
118c2ecf20Sopenharmony_ci */
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#include <linux/kernel.h>
148c2ecf20Sopenharmony_ci#include <linux/init.h>
158c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
168c2ecf20Sopenharmony_ci#include <linux/ata_platform.h>
178c2ecf20Sopenharmony_ci#include <linux/mv643xx_eth.h>
188c2ecf20Sopenharmony_ci#include <linux/ethtool.h>
198c2ecf20Sopenharmony_ci#include <linux/i2c.h>
208c2ecf20Sopenharmony_ci#include <asm/mach-types.h>
218c2ecf20Sopenharmony_ci#include <asm/mach/arch.h>
228c2ecf20Sopenharmony_ci#include "mv78xx0.h"
238c2ecf20Sopenharmony_ci#include "common.h"
248c2ecf20Sopenharmony_ci#include "mpp.h"
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/* This arch has 2 Giga Ethernet */
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_cistatic struct mv643xx_eth_platform_data db78x00_ge00_data = {
308c2ecf20Sopenharmony_ci	.phy_addr	= MV643XX_ETH_PHY_ADDR(0),
318c2ecf20Sopenharmony_ci};
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_cistatic struct mv643xx_eth_platform_data db78x00_ge01_data = {
348c2ecf20Sopenharmony_ci	.phy_addr	= MV643XX_ETH_PHY_ADDR(8),
358c2ecf20Sopenharmony_ci};
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci/* 2 SATA controller supporting HotPlug */
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_cistatic struct mv_sata_platform_data db78x00_sata_data = {
418c2ecf20Sopenharmony_ci	.n_ports	= 2,
428c2ecf20Sopenharmony_ci};
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_cistatic struct i2c_board_info __initdata db78x00_i2c_rtc = {
458c2ecf20Sopenharmony_ci	I2C_BOARD_INFO("ds1338", 0x68),
468c2ecf20Sopenharmony_ci};
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_cistatic unsigned int wxl_mpp_config[] __initdata = {
508c2ecf20Sopenharmony_ci	MPP0_GE1_TXCLK,
518c2ecf20Sopenharmony_ci	MPP1_GE1_TXCTL,
528c2ecf20Sopenharmony_ci	MPP2_GE1_RXCTL,
538c2ecf20Sopenharmony_ci	MPP3_GE1_RXCLK,
548c2ecf20Sopenharmony_ci	MPP4_GE1_TXD0,
558c2ecf20Sopenharmony_ci	MPP5_GE1_TXD1,
568c2ecf20Sopenharmony_ci	MPP6_GE1_TXD2,
578c2ecf20Sopenharmony_ci	MPP7_GE1_TXD3,
588c2ecf20Sopenharmony_ci	MPP8_GE1_RXD0,
598c2ecf20Sopenharmony_ci	MPP9_GE1_RXD1,
608c2ecf20Sopenharmony_ci	MPP10_GE1_RXD2,
618c2ecf20Sopenharmony_ci	MPP11_GE1_RXD3,
628c2ecf20Sopenharmony_ci	MPP12_GPIO,
638c2ecf20Sopenharmony_ci	MPP13_SYSRST_OUTn,
648c2ecf20Sopenharmony_ci	MPP14_SATA1_ACTn,
658c2ecf20Sopenharmony_ci	MPP15_SATA0_ACTn,
668c2ecf20Sopenharmony_ci	MPP16_GPIO,
678c2ecf20Sopenharmony_ci	MPP17_GPIO,
688c2ecf20Sopenharmony_ci	MPP18_GPIO,
698c2ecf20Sopenharmony_ci	MPP19_GPIO,
708c2ecf20Sopenharmony_ci	MPP20_GPIO,
718c2ecf20Sopenharmony_ci	MPP21_GPIO,
728c2ecf20Sopenharmony_ci	MPP22_GPIO,
738c2ecf20Sopenharmony_ci	MPP23_GPIO,
748c2ecf20Sopenharmony_ci	MPP24_UA2_TXD,
758c2ecf20Sopenharmony_ci	MPP25_UA2_RXD,
768c2ecf20Sopenharmony_ci	MPP26_UA2_CTSn,
778c2ecf20Sopenharmony_ci	MPP27_UA2_RTSn,
788c2ecf20Sopenharmony_ci	MPP28_GPIO,
798c2ecf20Sopenharmony_ci	MPP29_SYSRST_OUTn,
808c2ecf20Sopenharmony_ci	MPP30_GPIO,
818c2ecf20Sopenharmony_ci	MPP31_GPIO,
828c2ecf20Sopenharmony_ci	MPP32_GPIO,
838c2ecf20Sopenharmony_ci	MPP33_GPIO,
848c2ecf20Sopenharmony_ci	MPP34_GPIO,
858c2ecf20Sopenharmony_ci	MPP35_GPIO,
868c2ecf20Sopenharmony_ci	MPP36_GPIO,
878c2ecf20Sopenharmony_ci	MPP37_GPIO,
888c2ecf20Sopenharmony_ci	MPP38_GPIO,
898c2ecf20Sopenharmony_ci	MPP39_GPIO,
908c2ecf20Sopenharmony_ci	MPP40_UNUSED,
918c2ecf20Sopenharmony_ci	MPP41_UNUSED,
928c2ecf20Sopenharmony_ci	MPP42_UNUSED,
938c2ecf20Sopenharmony_ci	MPP43_UNUSED,
948c2ecf20Sopenharmony_ci	MPP44_UNUSED,
958c2ecf20Sopenharmony_ci	MPP45_UNUSED,
968c2ecf20Sopenharmony_ci	MPP46_UNUSED,
978c2ecf20Sopenharmony_ci	MPP47_UNUSED,
988c2ecf20Sopenharmony_ci	MPP48_SATA1_ACTn,
998c2ecf20Sopenharmony_ci	MPP49_SATA0_ACTn,
1008c2ecf20Sopenharmony_ci	0
1018c2ecf20Sopenharmony_ci};
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_cistatic void __init wxl_init(void)
1058c2ecf20Sopenharmony_ci{
1068c2ecf20Sopenharmony_ci	/*
1078c2ecf20Sopenharmony_ci	 * Basic MV78xx0 setup. Needs to be called early.
1088c2ecf20Sopenharmony_ci	 */
1098c2ecf20Sopenharmony_ci	mv78xx0_init();
1108c2ecf20Sopenharmony_ci	mv78xx0_mpp_conf(wxl_mpp_config);
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci	/*
1138c2ecf20Sopenharmony_ci	 * Partition on-chip peripherals between the two CPU cores.
1148c2ecf20Sopenharmony_ci	 */
1158c2ecf20Sopenharmony_ci	mv78xx0_ehci0_init();
1168c2ecf20Sopenharmony_ci	mv78xx0_ehci1_init();
1178c2ecf20Sopenharmony_ci	mv78xx0_ehci2_init();
1188c2ecf20Sopenharmony_ci	mv78xx0_ge00_init(&db78x00_ge00_data);
1198c2ecf20Sopenharmony_ci	mv78xx0_ge01_init(&db78x00_ge01_data);
1208c2ecf20Sopenharmony_ci	mv78xx0_sata_init(&db78x00_sata_data);
1218c2ecf20Sopenharmony_ci	mv78xx0_uart0_init();
1228c2ecf20Sopenharmony_ci	mv78xx0_uart1_init();
1238c2ecf20Sopenharmony_ci	mv78xx0_uart2_init();
1248c2ecf20Sopenharmony_ci	mv78xx0_uart3_init();
1258c2ecf20Sopenharmony_ci	mv78xx0_i2c_init();
1268c2ecf20Sopenharmony_ci	i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
1278c2ecf20Sopenharmony_ci}
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_cistatic int __init wxl_pci_init(void)
1308c2ecf20Sopenharmony_ci{
1318c2ecf20Sopenharmony_ci	if (machine_is_terastation_wxl()) {
1328c2ecf20Sopenharmony_ci		/*
1338c2ecf20Sopenharmony_ci		 * Assign the x16 PCIe slot on the board to CPU core
1348c2ecf20Sopenharmony_ci		 * #0, and let CPU core #1 have the four x1 slots.
1358c2ecf20Sopenharmony_ci		 */
1368c2ecf20Sopenharmony_ci		if (mv78xx0_core_index() == 0)
1378c2ecf20Sopenharmony_ci			mv78xx0_pcie_init(0, 1);
1388c2ecf20Sopenharmony_ci		else
1398c2ecf20Sopenharmony_ci			mv78xx0_pcie_init(1, 0);
1408c2ecf20Sopenharmony_ci	}
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_ci	return 0;
1438c2ecf20Sopenharmony_ci}
1448c2ecf20Sopenharmony_cisubsys_initcall(wxl_pci_init);
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_ciMACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
1478c2ecf20Sopenharmony_ci	/* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */
1488c2ecf20Sopenharmony_ci	.atag_offset	= 0x100,
1498c2ecf20Sopenharmony_ci	.nr_irqs	= MV78XX0_NR_IRQS,
1508c2ecf20Sopenharmony_ci	.init_machine	= wxl_init,
1518c2ecf20Sopenharmony_ci	.map_io		= mv78xx0_map_io,
1528c2ecf20Sopenharmony_ci	.init_early	= mv78xx0_init_early,
1538c2ecf20Sopenharmony_ci	.init_irq	= mv78xx0_init_irq,
1548c2ecf20Sopenharmony_ci	.init_time	= mv78xx0_timer_init,
1558c2ecf20Sopenharmony_ci	.restart	= mv78xx0_restart,
1568c2ecf20Sopenharmony_ciMACHINE_END
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