18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Timers Module 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci#ifndef __ASM_MACH_REGS_TIMERS_H 78c2ecf20Sopenharmony_ci#define __ASM_MACH_REGS_TIMERS_H 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#include "addr-map.h" 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000) 128c2ecf20Sopenharmony_ci#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000) 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci#define TMR_CCR (0x0000) 158c2ecf20Sopenharmony_ci#define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2)) 168c2ecf20Sopenharmony_ci#define TMR_CR(n) (0x0028 + ((n) << 2)) 178c2ecf20Sopenharmony_ci#define TMR_SR(n) (0x0034 + ((n) << 2)) 188c2ecf20Sopenharmony_ci#define TMR_IER(n) (0x0040 + ((n) << 2)) 198c2ecf20Sopenharmony_ci#define TMR_PLVR(n) (0x004c + ((n) << 2)) 208c2ecf20Sopenharmony_ci#define TMR_PLCR(n) (0x0058 + ((n) << 2)) 218c2ecf20Sopenharmony_ci#define TMR_WMER (0x0064) 228c2ecf20Sopenharmony_ci#define TMR_WMR (0x0068) 238c2ecf20Sopenharmony_ci#define TMR_WVR (0x006c) 248c2ecf20Sopenharmony_ci#define TMR_WSR (0x0070) 258c2ecf20Sopenharmony_ci#define TMR_ICR(n) (0x0074 + ((n) << 2)) 268c2ecf20Sopenharmony_ci#define TMR_WICR (0x0080) 278c2ecf20Sopenharmony_ci#define TMR_CER (0x0084) 288c2ecf20Sopenharmony_ci#define TMR_CMR (0x0088) 298c2ecf20Sopenharmony_ci#define TMR_ILR(n) (0x008c + ((n) << 2)) 308c2ecf20Sopenharmony_ci#define TMR_WCR (0x0098) 318c2ecf20Sopenharmony_ci#define TMR_WFAR (0x009c) 328c2ecf20Sopenharmony_ci#define TMR_WSAR (0x00A0) 338c2ecf20Sopenharmony_ci#define TMR_CVWR(n) (0x00A4 + ((n) << 2)) 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#define TMR_CCR_CS_0(x) (((x) & 0x3) << 0) 368c2ecf20Sopenharmony_ci#define TMR_CCR_CS_1(x) (((x) & 0x7) << 2) 378c2ecf20Sopenharmony_ci#define TMR_CCR_CS_2(x) (((x) & 0x3) << 5) 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci#endif /* __ASM_MACH_REGS_TIMERS_H */ 40