1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * arch/arm/mach-ixp4xx/nslu2-pci.c
4 *
5 * NSLU2 board-level PCI initialization
6 *
7 * based on ixdp425-pci.c:
8 *	Copyright (C) 2002 Intel Corporation.
9 *	Copyright (C) 2003-2004 MontaVista Software, Inc.
10 *
11 * Maintainer: http://www.nslu2-linux.org/
12 */
13
14#include <linux/pci.h>
15#include <linux/init.h>
16#include <linux/irq.h>
17#include <asm/mach/pci.h>
18#include <asm/mach-types.h>
19
20#include "irqs.h"
21
22#define MAX_DEV		3
23#define IRQ_LINES	3
24
25/* PCI controller GPIO to IRQ pin mappings */
26#define INTA		11
27#define INTB		10
28#define INTC		9
29#define INTD		8
30
31void __init nslu2_pci_preinit(void)
32{
33	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
34	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
35	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
36	ixp4xx_pci_preinit();
37}
38
39static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
40{
41	static int pci_irq_table[IRQ_LINES] = {
42		IXP4XX_GPIO_IRQ(INTA),
43		IXP4XX_GPIO_IRQ(INTB),
44		IXP4XX_GPIO_IRQ(INTC),
45	};
46
47	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
48		return pci_irq_table[(slot + pin - 2) % IRQ_LINES];
49
50	return -1;
51}
52
53struct hw_pci __initdata nslu2_pci = {
54	.nr_controllers = 1,
55	.ops		= &ixp4xx_ops,
56	.preinit	= nslu2_pci_preinit,
57	.setup		= ixp4xx_setup,
58	.map_irq	= nslu2_map_irq,
59};
60
61int __init nslu2_pci_init(void) /* monkey see, monkey do */
62{
63	if (machine_is_nslu2())
64		pci_common_init(&nslu2_pci);
65
66	return 0;
67}
68
69subsys_initcall(nslu2_pci_init);
70