18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * arch/arm/mach-ixp4xx/gtwx5715-setup.c 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Gemtek GTWX5715 (Linksys WRV54G) board setup 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Copyright (C) 2004 George T. Joseph 88c2ecf20Sopenharmony_ci * Derived from Coyote 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <linux/init.h> 128c2ecf20Sopenharmony_ci#include <linux/device.h> 138c2ecf20Sopenharmony_ci#include <linux/serial.h> 148c2ecf20Sopenharmony_ci#include <linux/tty.h> 158c2ecf20Sopenharmony_ci#include <linux/serial_8250.h> 168c2ecf20Sopenharmony_ci#include <asm/types.h> 178c2ecf20Sopenharmony_ci#include <asm/setup.h> 188c2ecf20Sopenharmony_ci#include <asm/memory.h> 198c2ecf20Sopenharmony_ci#include <mach/hardware.h> 208c2ecf20Sopenharmony_ci#include <asm/irq.h> 218c2ecf20Sopenharmony_ci#include <asm/mach-types.h> 228c2ecf20Sopenharmony_ci#include <asm/mach/arch.h> 238c2ecf20Sopenharmony_ci#include <asm/mach/flash.h> 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci#include "irqs.h" 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci/* GPIO 5,6,7 and 12 are hard wired to the Kendin KS8995M Switch 288c2ecf20Sopenharmony_ci and operate as an SPI type interface. The details of the interface 298c2ecf20Sopenharmony_ci are available on Kendin/Micrel's web site. */ 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci#define GTWX5715_KSSPI_SELECT 5 328c2ecf20Sopenharmony_ci#define GTWX5715_KSSPI_TXD 6 338c2ecf20Sopenharmony_ci#define GTWX5715_KSSPI_CLOCK 7 348c2ecf20Sopenharmony_ci#define GTWX5715_KSSPI_RXD 12 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci/* The "reset" button is wired to GPIO 3. 378c2ecf20Sopenharmony_ci The GPIO is brought "low" when the button is pushed. */ 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci#define GTWX5715_BUTTON_GPIO 3 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci/* Board Label Front Label 428c2ecf20Sopenharmony_ci LED1 Power 438c2ecf20Sopenharmony_ci LED2 Wireless-G 448c2ecf20Sopenharmony_ci LED3 not populated but could be 458c2ecf20Sopenharmony_ci LED4 Internet 468c2ecf20Sopenharmony_ci LED5 - LED8 Controlled by KS8995M Switch 478c2ecf20Sopenharmony_ci LED9 DMZ */ 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci#define GTWX5715_LED1_GPIO 2 508c2ecf20Sopenharmony_ci#define GTWX5715_LED2_GPIO 9 518c2ecf20Sopenharmony_ci#define GTWX5715_LED3_GPIO 8 528c2ecf20Sopenharmony_ci#define GTWX5715_LED4_GPIO 1 538c2ecf20Sopenharmony_ci#define GTWX5715_LED9_GPIO 4 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci/* 568c2ecf20Sopenharmony_ci * Xscale UART registers are 32 bits wide with only the least 578c2ecf20Sopenharmony_ci * significant 8 bits having any meaning. From a configuration 588c2ecf20Sopenharmony_ci * perspective, this means 2 things... 598c2ecf20Sopenharmony_ci * 608c2ecf20Sopenharmony_ci * Setting .regshift = 2 so that the standard 16550 registers 618c2ecf20Sopenharmony_ci * line up on every 4th byte. 628c2ecf20Sopenharmony_ci * 638c2ecf20Sopenharmony_ci * Shifting the register start virtual address +3 bytes when 648c2ecf20Sopenharmony_ci * compiled big-endian. Since register writes are done on a 658c2ecf20Sopenharmony_ci * single byte basis, if the shift isn't done the driver will 668c2ecf20Sopenharmony_ci * write the value into the most significant byte of the register, 678c2ecf20Sopenharmony_ci * which is ignored, instead of the least significant. 688c2ecf20Sopenharmony_ci */ 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci#ifdef __ARMEB__ 718c2ecf20Sopenharmony_ci#define REG_OFFSET 3 728c2ecf20Sopenharmony_ci#else 738c2ecf20Sopenharmony_ci#define REG_OFFSET 0 748c2ecf20Sopenharmony_ci#endif 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci/* 778c2ecf20Sopenharmony_ci * Only the second or "console" uart is connected on the gtwx5715. 788c2ecf20Sopenharmony_ci */ 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_cistatic struct resource gtwx5715_uart_resources[] = { 818c2ecf20Sopenharmony_ci { 828c2ecf20Sopenharmony_ci .start = IXP4XX_UART2_BASE_PHYS, 838c2ecf20Sopenharmony_ci .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, 848c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 858c2ecf20Sopenharmony_ci }, 868c2ecf20Sopenharmony_ci { 878c2ecf20Sopenharmony_ci .start = IRQ_IXP4XX_UART2, 888c2ecf20Sopenharmony_ci .end = IRQ_IXP4XX_UART2, 898c2ecf20Sopenharmony_ci .flags = IORESOURCE_IRQ, 908c2ecf20Sopenharmony_ci }, 918c2ecf20Sopenharmony_ci { }, 928c2ecf20Sopenharmony_ci}; 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_cistatic struct plat_serial8250_port gtwx5715_uart_platform_data[] = { 968c2ecf20Sopenharmony_ci { 978c2ecf20Sopenharmony_ci .mapbase = IXP4XX_UART2_BASE_PHYS, 988c2ecf20Sopenharmony_ci .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, 998c2ecf20Sopenharmony_ci .irq = IRQ_IXP4XX_UART2, 1008c2ecf20Sopenharmony_ci .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 1018c2ecf20Sopenharmony_ci .iotype = UPIO_MEM, 1028c2ecf20Sopenharmony_ci .regshift = 2, 1038c2ecf20Sopenharmony_ci .uartclk = IXP4XX_UART_XTAL, 1048c2ecf20Sopenharmony_ci }, 1058c2ecf20Sopenharmony_ci { }, 1068c2ecf20Sopenharmony_ci}; 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_cistatic struct platform_device gtwx5715_uart_device = { 1098c2ecf20Sopenharmony_ci .name = "serial8250", 1108c2ecf20Sopenharmony_ci .id = PLAT8250_DEV_PLATFORM, 1118c2ecf20Sopenharmony_ci .dev = { 1128c2ecf20Sopenharmony_ci .platform_data = gtwx5715_uart_platform_data, 1138c2ecf20Sopenharmony_ci }, 1148c2ecf20Sopenharmony_ci .num_resources = 2, 1158c2ecf20Sopenharmony_ci .resource = gtwx5715_uart_resources, 1168c2ecf20Sopenharmony_ci}; 1178c2ecf20Sopenharmony_ci 1188c2ecf20Sopenharmony_cistatic struct flash_platform_data gtwx5715_flash_data = { 1198c2ecf20Sopenharmony_ci .map_name = "cfi_probe", 1208c2ecf20Sopenharmony_ci .width = 2, 1218c2ecf20Sopenharmony_ci}; 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_cistatic struct resource gtwx5715_flash_resource = { 1248c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 1258c2ecf20Sopenharmony_ci}; 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_cistatic struct platform_device gtwx5715_flash = { 1288c2ecf20Sopenharmony_ci .name = "IXP4XX-Flash", 1298c2ecf20Sopenharmony_ci .id = 0, 1308c2ecf20Sopenharmony_ci .dev = { 1318c2ecf20Sopenharmony_ci .platform_data = >wx5715_flash_data, 1328c2ecf20Sopenharmony_ci }, 1338c2ecf20Sopenharmony_ci .num_resources = 1, 1348c2ecf20Sopenharmony_ci .resource = >wx5715_flash_resource, 1358c2ecf20Sopenharmony_ci}; 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_cistatic struct platform_device *gtwx5715_devices[] __initdata = { 1388c2ecf20Sopenharmony_ci >wx5715_uart_device, 1398c2ecf20Sopenharmony_ci >wx5715_flash, 1408c2ecf20Sopenharmony_ci}; 1418c2ecf20Sopenharmony_ci 1428c2ecf20Sopenharmony_cistatic void __init gtwx5715_init(void) 1438c2ecf20Sopenharmony_ci{ 1448c2ecf20Sopenharmony_ci ixp4xx_sys_init(); 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); 1478c2ecf20Sopenharmony_ci gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci platform_add_devices(gtwx5715_devices, ARRAY_SIZE(gtwx5715_devices)); 1508c2ecf20Sopenharmony_ci} 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ciMACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") 1548c2ecf20Sopenharmony_ci /* Maintainer: George Joseph */ 1558c2ecf20Sopenharmony_ci .map_io = ixp4xx_map_io, 1568c2ecf20Sopenharmony_ci .init_early = ixp4xx_init_early, 1578c2ecf20Sopenharmony_ci .init_irq = ixp4xx_init_irq, 1588c2ecf20Sopenharmony_ci .init_time = ixp4xx_timer_init, 1598c2ecf20Sopenharmony_ci .atag_offset = 0x100, 1608c2ecf20Sopenharmony_ci .init_machine = gtwx5715_init, 1618c2ecf20Sopenharmony_ci#if defined(CONFIG_PCI) 1628c2ecf20Sopenharmony_ci .dma_zone_size = SZ_64M, 1638c2ecf20Sopenharmony_ci#endif 1648c2ecf20Sopenharmony_ci .restart = ixp4xx_restart, 1658c2ecf20Sopenharmony_ciMACHINE_END 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci 168