18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * arch/arm/mach-ixp4xx/gtwx5715-pci.c
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Gemtek GTWX5715 (Linksys WRV54G) board setup
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Copyright (C) 2004 George T. Joseph
88c2ecf20Sopenharmony_ci * Derived from Coyote
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <linux/pci.h>
128c2ecf20Sopenharmony_ci#include <linux/init.h>
138c2ecf20Sopenharmony_ci#include <linux/delay.h>
148c2ecf20Sopenharmony_ci#include <linux/irq.h>
158c2ecf20Sopenharmony_ci#include <asm/mach-types.h>
168c2ecf20Sopenharmony_ci#include <mach/hardware.h>
178c2ecf20Sopenharmony_ci#include <asm/mach/pci.h>
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci#include "irqs.h"
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci#define SLOT0_DEVID	0
228c2ecf20Sopenharmony_ci#define SLOT1_DEVID	1
238c2ecf20Sopenharmony_ci#define INTA		10 /* slot 1 has INTA and INTB crossed */
248c2ecf20Sopenharmony_ci#define INTB		11
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci/*
278c2ecf20Sopenharmony_ci * Slot 0 isn't actually populated with a card connector but
288c2ecf20Sopenharmony_ci * we initialize it anyway in case a future version has the
298c2ecf20Sopenharmony_ci * slot populated or someone with good soldering skills has
308c2ecf20Sopenharmony_ci * some free time.
318c2ecf20Sopenharmony_ci */
328c2ecf20Sopenharmony_civoid __init gtwx5715_pci_preinit(void)
338c2ecf20Sopenharmony_ci{
348c2ecf20Sopenharmony_ci	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
358c2ecf20Sopenharmony_ci	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
368c2ecf20Sopenharmony_ci	ixp4xx_pci_preinit();
378c2ecf20Sopenharmony_ci}
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_cistatic int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
418c2ecf20Sopenharmony_ci{
428c2ecf20Sopenharmony_ci	int rc = -1;
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci	if ((slot == SLOT0_DEVID && pin == 1) ||
458c2ecf20Sopenharmony_ci	    (slot == SLOT1_DEVID && pin == 2))
468c2ecf20Sopenharmony_ci		rc = IXP4XX_GPIO_IRQ(INTA);
478c2ecf20Sopenharmony_ci	else if ((slot == SLOT0_DEVID && pin == 2) ||
488c2ecf20Sopenharmony_ci		 (slot == SLOT1_DEVID && pin == 1))
498c2ecf20Sopenharmony_ci		rc = IXP4XX_GPIO_IRQ(INTB);
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
528c2ecf20Sopenharmony_ci	       __func__, slot, pin, rc);
538c2ecf20Sopenharmony_ci	return rc;
548c2ecf20Sopenharmony_ci}
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_cistruct hw_pci gtwx5715_pci __initdata = {
578c2ecf20Sopenharmony_ci	.nr_controllers = 1,
588c2ecf20Sopenharmony_ci	.ops		= &ixp4xx_ops,
598c2ecf20Sopenharmony_ci	.preinit =        gtwx5715_pci_preinit,
608c2ecf20Sopenharmony_ci	.setup =          ixp4xx_setup,
618c2ecf20Sopenharmony_ci	.map_irq =        gtwx5715_map_irq,
628c2ecf20Sopenharmony_ci};
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ciint __init gtwx5715_pci_init(void)
658c2ecf20Sopenharmony_ci{
668c2ecf20Sopenharmony_ci	if (machine_is_gtwx5715())
678c2ecf20Sopenharmony_ci		pci_common_init(&gtwx5715_pci);
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci	return 0;
708c2ecf20Sopenharmony_ci}
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_cisubsys_initcall(gtwx5715_pci_init);
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