1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * arch/arch/mach-ixp4xx/fsg-pci.c
4 *
5 * FSG board-level PCI initialization
6 *
7 * Author: Rod Whitby <rod@whitby.id.au>
8 * Maintainer: http://www.nslu2-linux.org/
9 *
10 * based on ixdp425-pci.c:
11 *	Copyright (C) 2002 Intel Corporation.
12 *	Copyright (C) 2003-2004 MontaVista Software, Inc.
13 */
14
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/irq.h>
18#include <asm/mach/pci.h>
19#include <asm/mach-types.h>
20
21#include "irqs.h"
22
23#define MAX_DEV		3
24#define IRQ_LINES	3
25
26/* PCI controller GPIO to IRQ pin mappings */
27#define INTA	6
28#define INTB	7
29#define INTC	5
30
31void __init fsg_pci_preinit(void)
32{
33	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
34	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
35	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
36	ixp4xx_pci_preinit();
37}
38
39static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
40{
41	static int pci_irq_table[IRQ_LINES] = {
42		IXP4XX_GPIO_IRQ(INTC),
43		IXP4XX_GPIO_IRQ(INTB),
44		IXP4XX_GPIO_IRQ(INTA),
45	};
46
47	int irq = -1;
48	slot -= 11;
49
50	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
51		irq = pci_irq_table[slot - 1];
52	printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
53	       __func__, slot, pin, irq);
54
55	return irq;
56}
57
58struct hw_pci fsg_pci __initdata = {
59	.nr_controllers = 1,
60	.ops		= &ixp4xx_ops,
61	.preinit =	  fsg_pci_preinit,
62	.setup =	  ixp4xx_setup,
63	.map_irq =	  fsg_map_irq,
64};
65
66int __init fsg_pci_init(void)
67{
68	if (machine_is_fsg())
69		pci_common_init(&fsg_pci);
70	return 0;
71}
72
73subsys_initcall(fsg_pci_init);
74