18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci#ifndef __HARDWARE_H
38c2ecf20Sopenharmony_ci#define __HARDWARE_H
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci#include <asm/types.h>
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci/*
88c2ecf20Sopenharmony_ci * Note about PCI IO space mappings
98c2ecf20Sopenharmony_ci *
108c2ecf20Sopenharmony_ci * To make IO space accesses efficient, we store virtual addresses in
118c2ecf20Sopenharmony_ci * the IO resources.
128c2ecf20Sopenharmony_ci *
138c2ecf20Sopenharmony_ci * The PCI IO space is located at virtual 0xfe000000 from physical
148c2ecf20Sopenharmony_ci * 0x90000000. The PCI BARs must be programmed with physical addresses,
158c2ecf20Sopenharmony_ci * but when we read them, we convert them to virtual addresses. See
168c2ecf20Sopenharmony_ci * arch/arm/plat-iop/pci.c.
178c2ecf20Sopenharmony_ci */
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci#ifndef __ASSEMBLY__
208c2ecf20Sopenharmony_civoid iop32x_init_irq(void);
218c2ecf20Sopenharmony_ci#endif
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci/*
258c2ecf20Sopenharmony_ci * Generic chipset bits
268c2ecf20Sopenharmony_ci */
278c2ecf20Sopenharmony_ci#include "iop3xx.h"
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci/*
308c2ecf20Sopenharmony_ci * Board specific bits
318c2ecf20Sopenharmony_ci */
328c2ecf20Sopenharmony_ci#include "glantank.h"
338c2ecf20Sopenharmony_ci#include "iq80321.h"
348c2ecf20Sopenharmony_ci#include "iq31244.h"
358c2ecf20Sopenharmony_ci#include "n2100.h"
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci#endif
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