1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * arch/arm/mach-ep93xx/ts72xx.c
4 * Technologic Systems TS72xx SBC support.
5 *
6 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
7 */
8
9#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <linux/mtd/platnand.h>
16#include <linux/spi/spi.h>
17#include <linux/spi/flash.h>
18#include <linux/spi/mmc_spi.h>
19#include <linux/mmc/host.h>
20#include <linux/platform_data/spi-ep93xx.h>
21#include <linux/gpio/machine.h>
22
23#include "gpio-ep93xx.h"
24#include "hardware.h"
25#include <mach/irqs.h>
26
27#include <asm/mach-types.h>
28#include <asm/mach/map.h>
29#include <asm/mach/arch.h>
30
31#include "soc.h"
32#include "ts72xx.h"
33
34/*************************************************************************
35 * IO map
36 *************************************************************************/
37static struct map_desc ts72xx_io_desc[] __initdata = {
38	{
39		.virtual	= (unsigned long)TS72XX_MODEL_VIRT_BASE,
40		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
41		.length		= TS72XX_MODEL_SIZE,
42		.type		= MT_DEVICE,
43	}, {
44		.virtual	= (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
45		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
46		.length		= TS72XX_OPTIONS_SIZE,
47		.type		= MT_DEVICE,
48	}, {
49		.virtual	= (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
50		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
51		.length		= TS72XX_OPTIONS2_SIZE,
52		.type		= MT_DEVICE,
53	}, {
54		.virtual	= (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
55		.pfn		= __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
56		.length		= TS72XX_CPLDVER_SIZE,
57		.type		= MT_DEVICE,
58	}
59};
60
61static void __init ts72xx_map_io(void)
62{
63	ep93xx_map_io();
64	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
65}
66
67
68/*************************************************************************
69 * NAND flash
70 *************************************************************************/
71#define TS72XX_NAND_CONTROL_ADDR_LINE	22	/* 0xN0400000 */
72#define TS72XX_NAND_BUSY_ADDR_LINE	23	/* 0xN0800000 */
73
74static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
75				  int cmd, unsigned int ctrl)
76{
77	if (ctrl & NAND_CTRL_CHANGE) {
78		void __iomem *addr = chip->legacy.IO_ADDR_R;
79		unsigned char bits;
80
81		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
82
83		bits = __raw_readb(addr) & ~0x07;
84		bits |= (ctrl & NAND_NCE) << 2;	/* bit 0 -> bit 2 */
85		bits |= (ctrl & NAND_CLE);	/* bit 1 -> bit 1 */
86		bits |= (ctrl & NAND_ALE) >> 2;	/* bit 2 -> bit 0 */
87
88		__raw_writeb(bits, addr);
89	}
90
91	if (cmd != NAND_CMD_NONE)
92		__raw_writeb(cmd, chip->legacy.IO_ADDR_W);
93}
94
95static int ts72xx_nand_device_ready(struct nand_chip *chip)
96{
97	void __iomem *addr = chip->legacy.IO_ADDR_R;
98
99	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
100
101	return !!(__raw_readb(addr) & 0x20);
102}
103
104#define TS72XX_BOOTROM_PART_SIZE	(SZ_16K)
105#define TS72XX_REDBOOT_PART_SIZE	(SZ_2M + SZ_1M)
106
107static struct mtd_partition ts72xx_nand_parts[] = {
108	{
109		.name		= "TS-BOOTROM",
110		.offset		= 0,
111		.size		= TS72XX_BOOTROM_PART_SIZE,
112		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
113	}, {
114		.name		= "Linux",
115		.offset		= MTDPART_OFS_RETAIN,
116		.size		= TS72XX_REDBOOT_PART_SIZE,
117				/* leave so much for last partition */
118	}, {
119		.name		= "RedBoot",
120		.offset		= MTDPART_OFS_APPEND,
121		.size		= MTDPART_SIZ_FULL,
122		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
123	},
124};
125
126static struct platform_nand_data ts72xx_nand_data = {
127	.chip = {
128		.nr_chips	= 1,
129		.chip_offset	= 0,
130		.chip_delay	= 15,
131	},
132	.ctrl = {
133		.cmd_ctrl	= ts72xx_nand_hwcontrol,
134		.dev_ready	= ts72xx_nand_device_ready,
135	},
136};
137
138static struct resource ts72xx_nand_resource[] = {
139	{
140		.start		= 0,			/* filled in later */
141		.end		= 0,			/* filled in later */
142		.flags		= IORESOURCE_MEM,
143	},
144};
145
146static struct platform_device ts72xx_nand_flash = {
147	.name			= "gen_nand",
148	.id			= -1,
149	.dev.platform_data	= &ts72xx_nand_data,
150	.resource		= ts72xx_nand_resource,
151	.num_resources		= ARRAY_SIZE(ts72xx_nand_resource),
152};
153
154void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
155				  resource_size_t start)
156{
157	/*
158	 * TS7200 has NOR flash all other TS72xx board have NAND flash.
159	 */
160	if (board_is_ts7200()) {
161		ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
162	} else {
163		ts72xx_nand_resource[0].start = start;
164		ts72xx_nand_resource[0].end = start + SZ_16M - 1;
165
166		ts72xx_nand_data.chip.partitions = parts;
167		ts72xx_nand_data.chip.nr_partitions = n;
168
169		platform_device_register(&ts72xx_nand_flash);
170	}
171}
172
173/*************************************************************************
174 * RTC M48T86
175 *************************************************************************/
176#define TS72XX_RTC_INDEX_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x00800000)
177#define TS72XX_RTC_DATA_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x01700000)
178
179static struct resource ts72xx_rtc_resources[] = {
180	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
181	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
182};
183
184static struct platform_device ts72xx_rtc_device = {
185	.name		= "rtc-m48t86",
186	.id		= -1,
187	.resource	= ts72xx_rtc_resources,
188	.num_resources 	= ARRAY_SIZE(ts72xx_rtc_resources),
189};
190
191/*************************************************************************
192 * Watchdog (in CPLD)
193 *************************************************************************/
194#define TS72XX_WDT_CONTROL_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03800000)
195#define TS72XX_WDT_FEED_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03c00000)
196
197static struct resource ts72xx_wdt_resources[] = {
198	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
199	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
200};
201
202static struct platform_device ts72xx_wdt_device = {
203	.name		= "ts72xx-wdt",
204	.id		= -1,
205	.resource	= ts72xx_wdt_resources,
206	.num_resources	= ARRAY_SIZE(ts72xx_wdt_resources),
207};
208
209/*************************************************************************
210 * ETH
211 *************************************************************************/
212static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
213	.phy_id		= 1,
214};
215
216/*************************************************************************
217 * SPI SD/MMC host
218 *************************************************************************/
219#define BK3_EN_SDCARD_PHYS_BASE         0x12400000
220#define BK3_EN_SDCARD_PWR 0x0
221#define BK3_DIS_SDCARD_PWR 0x0C
222static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
223{
224	void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
225
226	if (!pwr_sd) {
227		pr_err("Failed to enable SD card power!");
228		return;
229	}
230
231	pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
232		 !!vdd ? "ON" : "OFF", vdd);
233
234	if (!!vdd)
235		__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
236	else
237		__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
238
239	iounmap(pwr_sd);
240}
241
242static struct mmc_spi_platform_data bk3_spi_mmc_data = {
243	.detect_delay	= 500,
244	.powerup_msecs	= 100,
245	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
246	.caps		= MMC_CAP_NONREMOVABLE,
247	.setpower       = bk3_mmc_spi_setpower,
248};
249
250/*************************************************************************
251 * SPI Bus - SD card access
252 *************************************************************************/
253static struct spi_board_info bk3_spi_board_info[] __initdata = {
254	{
255		.modalias		= "mmc_spi",
256		.platform_data		= &bk3_spi_mmc_data,
257		.max_speed_hz		= 7.4E6,
258		.bus_num		= 0,
259		.chip_select		= 0,
260		.mode			= SPI_MODE_0,
261	},
262};
263
264/*
265 * This is a stub -> the FGPIO[3] pin is not connected on the schematic
266 * The all work is performed automatically by !SPI_FRAME (SFRM1) and
267 * goes through CPLD
268 */
269static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
270	.dev_id = "spi0",
271	.table = {
272		GPIO_LOOKUP("F", 3, "cs", GPIO_ACTIVE_LOW),
273		{ },
274	},
275};
276
277static struct ep93xx_spi_info bk3_spi_master __initdata = {
278	.use_dma	= 1,
279};
280
281/*************************************************************************
282 * TS72XX support code
283 *************************************************************************/
284#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
285
286/* Relative to EP93XX_CS1_PHYS_BASE */
287#define TS73XX_FPGA_LOADER_BASE		0x03c00000
288
289static struct resource ts73xx_fpga_resources[] = {
290	{
291		.start	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
292		.end	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
293		.flags	= IORESOURCE_MEM,
294	},
295};
296
297static struct platform_device ts73xx_fpga_device = {
298	.name	= "ts73xx-fpga-mgr",
299	.id	= -1,
300	.resource = ts73xx_fpga_resources,
301	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
302};
303
304#endif
305
306/*************************************************************************
307 * SPI Bus
308 *************************************************************************/
309static struct spi_board_info ts72xx_spi_devices[] __initdata = {
310	{
311		.modalias		= "tmp122",
312		.max_speed_hz		= 2 * 1000 * 1000,
313		.bus_num		= 0,
314		.chip_select		= 0,
315	},
316};
317
318static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
319	.dev_id = "spi0",
320	.table = {
321		/* DIO_17 */
322		GPIO_LOOKUP("F", 2, "cs", GPIO_ACTIVE_LOW),
323		{ },
324	},
325};
326
327static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
328	/* Intentionally left blank */
329};
330
331static void __init ts72xx_init_machine(void)
332{
333	ep93xx_init_devices();
334	ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
335			      is_ts9420_installed() ?
336			      EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
337	platform_device_register(&ts72xx_rtc_device);
338	platform_device_register(&ts72xx_wdt_device);
339
340	ep93xx_register_eth(&ts72xx_eth_data, 1);
341#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
342	if (board_is_ts7300())
343		platform_device_register(&ts73xx_fpga_device);
344#endif
345	gpiod_add_lookup_table(&ts72xx_spi_cs_gpio_table);
346	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
347			    ARRAY_SIZE(ts72xx_spi_devices));
348}
349
350MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
351	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
352	.atag_offset	= 0x100,
353	.map_io		= ts72xx_map_io,
354	.init_irq	= ep93xx_init_irq,
355	.init_time	= ep93xx_timer_init,
356	.init_machine	= ts72xx_init_machine,
357	.init_late	= ep93xx_init_late,
358	.restart	= ep93xx_restart,
359MACHINE_END
360
361/*************************************************************************
362 * EP93xx I2S audio peripheral handling
363 *************************************************************************/
364static struct resource ep93xx_i2s_resource[] = {
365	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
366	DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
367};
368
369static struct platform_device ep93xx_i2s_device = {
370	.name		= "ep93xx-spilink-i2s",
371	.id		= -1,
372	.num_resources	= ARRAY_SIZE(ep93xx_i2s_resource),
373	.resource	= ep93xx_i2s_resource,
374};
375
376/*************************************************************************
377 * BK3 support code
378 *************************************************************************/
379static struct mtd_partition bk3_nand_parts[] = {
380	{
381		.name		= "System",
382		.offset	= 0x00000000,
383		.size		= 0x01e00000,
384	}, {
385		.name		= "Data",
386		.offset	= 0x01e00000,
387		.size		= 0x05f20000
388	}, {
389		.name		= "RedBoot",
390		.offset	= 0x07d20000,
391		.size		= 0x002e0000,
392		.mask_flags	= MTD_WRITEABLE,	/* force RO */
393	},
394};
395
396static void __init bk3_init_machine(void)
397{
398	ep93xx_init_devices();
399
400	ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
401			      EP93XX_CS6_PHYS_BASE);
402
403	ep93xx_register_eth(&ts72xx_eth_data, 1);
404
405	gpiod_add_lookup_table(&bk3_spi_cs_gpio_table);
406	ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
407			    ARRAY_SIZE(bk3_spi_board_info));
408
409	/* Configure ep93xx's I2S to use AC97 pins */
410	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
411	platform_device_register(&ep93xx_i2s_device);
412}
413
414MACHINE_START(BK3, "Liebherr controller BK3.1")
415	/* Maintainer: Lukasz Majewski <lukma@denx.de> */
416	.atag_offset	= 0x100,
417	.map_io		= ts72xx_map_io,
418	.init_irq	= ep93xx_init_irq,
419	.init_time	= ep93xx_timer_init,
420	.init_machine	= bk3_init_machine,
421	.init_late	= ep93xx_init_late,
422	.restart	= ep93xx_restart,
423MACHINE_END
424