1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * arch/arm/mach-ep93xx/core.c 4 * Core routines for Cirrus EP93xx chips. 5 * 6 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> 7 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> 8 * 9 * Thanks go to Michael Burian and Ray Lehtiniemi for their key 10 * role in the ep93xx linux community. 11 */ 12 13#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt 14 15#include <linux/kernel.h> 16#include <linux/init.h> 17#include <linux/platform_device.h> 18#include <linux/interrupt.h> 19#include <linux/dma-mapping.h> 20#include <linux/sys_soc.h> 21#include <linux/irq.h> 22#include <linux/io.h> 23#include <linux/gpio.h> 24#include <linux/leds.h> 25#include <linux/termios.h> 26#include <linux/amba/bus.h> 27#include <linux/amba/serial.h> 28#include <linux/mtd/physmap.h> 29#include <linux/i2c.h> 30#include <linux/gpio/machine.h> 31#include <linux/spi/spi.h> 32#include <linux/export.h> 33#include <linux/irqchip/arm-vic.h> 34#include <linux/reboot.h> 35#include <linux/usb/ohci_pdriver.h> 36#include <linux/random.h> 37 38#include "hardware.h" 39#include <linux/platform_data/video-ep93xx.h> 40#include <linux/platform_data/keypad-ep93xx.h> 41#include <linux/platform_data/spi-ep93xx.h> 42#include <linux/soc/cirrus/ep93xx.h> 43 44#include "gpio-ep93xx.h" 45 46#include <asm/mach/arch.h> 47#include <asm/mach/map.h> 48 49#include "soc.h" 50 51/************************************************************************* 52 * Static I/O mappings that are needed for all EP93xx platforms 53 *************************************************************************/ 54static struct map_desc ep93xx_io_desc[] __initdata = { 55 { 56 .virtual = EP93XX_AHB_VIRT_BASE, 57 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE), 58 .length = EP93XX_AHB_SIZE, 59 .type = MT_DEVICE, 60 }, { 61 .virtual = EP93XX_APB_VIRT_BASE, 62 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE), 63 .length = EP93XX_APB_SIZE, 64 .type = MT_DEVICE, 65 }, 66}; 67 68void __init ep93xx_map_io(void) 69{ 70 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc)); 71} 72 73/************************************************************************* 74 * EP93xx IRQ handling 75 *************************************************************************/ 76void __init ep93xx_init_irq(void) 77{ 78 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0); 79 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0); 80} 81 82 83/************************************************************************* 84 * EP93xx System Controller Software Locked register handling 85 *************************************************************************/ 86 87/* 88 * syscon_swlock prevents anything else from writing to the syscon 89 * block while a software locked register is being written. 90 */ 91static DEFINE_SPINLOCK(syscon_swlock); 92 93void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg) 94{ 95 unsigned long flags; 96 97 spin_lock_irqsave(&syscon_swlock, flags); 98 99 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 100 __raw_writel(val, reg); 101 102 spin_unlock_irqrestore(&syscon_swlock, flags); 103} 104 105void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) 106{ 107 unsigned long flags; 108 unsigned int val; 109 110 spin_lock_irqsave(&syscon_swlock, flags); 111 112 val = __raw_readl(EP93XX_SYSCON_DEVCFG); 113 val &= ~clear_bits; 114 val |= set_bits; 115 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 116 __raw_writel(val, EP93XX_SYSCON_DEVCFG); 117 118 spin_unlock_irqrestore(&syscon_swlock, flags); 119} 120 121/** 122 * ep93xx_chip_revision() - returns the EP93xx chip revision 123 * 124 * See "platform.h" for more information. 125 */ 126unsigned int ep93xx_chip_revision(void) 127{ 128 unsigned int v; 129 130 v = __raw_readl(EP93XX_SYSCON_SYSCFG); 131 v &= EP93XX_SYSCON_SYSCFG_REV_MASK; 132 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT; 133 return v; 134} 135EXPORT_SYMBOL_GPL(ep93xx_chip_revision); 136 137/************************************************************************* 138 * EP93xx GPIO 139 *************************************************************************/ 140static struct resource ep93xx_gpio_resource[] = { 141 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc), 142 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB), 143 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO0MUX), 144 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO1MUX), 145 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO2MUX), 146 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO3MUX), 147 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO4MUX), 148 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO5MUX), 149 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO6MUX), 150 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO7MUX), 151}; 152 153static struct platform_device ep93xx_gpio_device = { 154 .name = "gpio-ep93xx", 155 .id = -1, 156 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource), 157 .resource = ep93xx_gpio_resource, 158}; 159 160/************************************************************************* 161 * EP93xx peripheral handling 162 *************************************************************************/ 163#define EP93XX_UART_MCR_OFFSET (0x0100) 164 165static void ep93xx_uart_set_mctrl(struct amba_device *dev, 166 void __iomem *base, unsigned int mctrl) 167{ 168 unsigned int mcr; 169 170 mcr = 0; 171 if (mctrl & TIOCM_RTS) 172 mcr |= 2; 173 if (mctrl & TIOCM_DTR) 174 mcr |= 1; 175 176 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); 177} 178 179static struct amba_pl010_data ep93xx_uart_data = { 180 .set_mctrl = ep93xx_uart_set_mctrl, 181}; 182 183static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, 184 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); 185 186static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, 187 { IRQ_EP93XX_UART2 }, NULL); 188 189static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, 190 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); 191 192static struct resource ep93xx_rtc_resource[] = { 193 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c), 194}; 195 196static struct platform_device ep93xx_rtc_device = { 197 .name = "ep93xx-rtc", 198 .id = -1, 199 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource), 200 .resource = ep93xx_rtc_resource, 201}; 202 203/************************************************************************* 204 * EP93xx OHCI USB Host 205 *************************************************************************/ 206 207static struct clk *ep93xx_ohci_host_clock; 208 209static int ep93xx_ohci_power_on(struct platform_device *pdev) 210{ 211 if (!ep93xx_ohci_host_clock) { 212 ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL); 213 if (IS_ERR(ep93xx_ohci_host_clock)) 214 return PTR_ERR(ep93xx_ohci_host_clock); 215 } 216 217 return clk_enable(ep93xx_ohci_host_clock); 218} 219 220static void ep93xx_ohci_power_off(struct platform_device *pdev) 221{ 222 clk_disable(ep93xx_ohci_host_clock); 223} 224 225static struct usb_ohci_pdata ep93xx_ohci_pdata = { 226 .power_on = ep93xx_ohci_power_on, 227 .power_off = ep93xx_ohci_power_off, 228 .power_suspend = ep93xx_ohci_power_off, 229}; 230 231static struct resource ep93xx_ohci_resources[] = { 232 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000), 233 DEFINE_RES_IRQ(IRQ_EP93XX_USB), 234}; 235 236static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32); 237 238static struct platform_device ep93xx_ohci_device = { 239 .name = "ohci-platform", 240 .id = -1, 241 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), 242 .resource = ep93xx_ohci_resources, 243 .dev = { 244 .dma_mask = &ep93xx_ohci_dma_mask, 245 .coherent_dma_mask = DMA_BIT_MASK(32), 246 .platform_data = &ep93xx_ohci_pdata, 247 }, 248}; 249 250/************************************************************************* 251 * EP93xx physmap'ed flash 252 *************************************************************************/ 253static struct physmap_flash_data ep93xx_flash_data; 254 255static struct resource ep93xx_flash_resource = { 256 .flags = IORESOURCE_MEM, 257}; 258 259static struct platform_device ep93xx_flash = { 260 .name = "physmap-flash", 261 .id = 0, 262 .dev = { 263 .platform_data = &ep93xx_flash_data, 264 }, 265 .num_resources = 1, 266 .resource = &ep93xx_flash_resource, 267}; 268 269/** 270 * ep93xx_register_flash() - Register the external flash device. 271 * @width: bank width in octets 272 * @start: resource start address 273 * @size: resource size 274 */ 275void __init ep93xx_register_flash(unsigned int width, 276 resource_size_t start, resource_size_t size) 277{ 278 ep93xx_flash_data.width = width; 279 280 ep93xx_flash_resource.start = start; 281 ep93xx_flash_resource.end = start + size - 1; 282 283 platform_device_register(&ep93xx_flash); 284} 285 286 287/************************************************************************* 288 * EP93xx ethernet peripheral handling 289 *************************************************************************/ 290static struct ep93xx_eth_data ep93xx_eth_data; 291 292static struct resource ep93xx_eth_resource[] = { 293 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000), 294 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET), 295}; 296 297static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32); 298 299static struct platform_device ep93xx_eth_device = { 300 .name = "ep93xx-eth", 301 .id = -1, 302 .dev = { 303 .platform_data = &ep93xx_eth_data, 304 .coherent_dma_mask = DMA_BIT_MASK(32), 305 .dma_mask = &ep93xx_eth_dma_mask, 306 }, 307 .num_resources = ARRAY_SIZE(ep93xx_eth_resource), 308 .resource = ep93xx_eth_resource, 309}; 310 311/** 312 * ep93xx_register_eth - Register the built-in ethernet platform device. 313 * @data: platform specific ethernet configuration (__initdata) 314 * @copy_addr: flag indicating that the MAC address should be copied 315 * from the IndAd registers (as programmed by the bootloader) 316 */ 317void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) 318{ 319 if (copy_addr) 320 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6); 321 322 ep93xx_eth_data = *data; 323 platform_device_register(&ep93xx_eth_device); 324} 325 326 327/************************************************************************* 328 * EP93xx i2c peripheral handling 329 *************************************************************************/ 330 331/* All EP93xx devices use the same two GPIO pins for I2C bit-banging */ 332static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = { 333 .dev_id = "i2c-gpio.0", 334 .table = { 335 /* Use local offsets on gpiochip/port "G" */ 336 GPIO_LOOKUP_IDX("G", 1, NULL, 0, 337 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), 338 GPIO_LOOKUP_IDX("G", 0, NULL, 1, 339 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), 340 }, 341}; 342 343static struct platform_device ep93xx_i2c_device = { 344 .name = "i2c-gpio", 345 .id = 0, 346 .dev = { 347 .platform_data = NULL, 348 }, 349}; 350 351/** 352 * ep93xx_register_i2c - Register the i2c platform device. 353 * @devices: platform specific i2c bus device information (__initdata) 354 * @num: the number of devices on the i2c bus 355 */ 356void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num) 357{ 358 /* 359 * FIXME: this just sets the two pins as non-opendrain, as no 360 * platforms tries to do that anyway. Flag the applicable lines 361 * as open drain in the GPIO_LOOKUP above and the driver or 362 * gpiolib will handle open drain/open drain emulation as need 363 * be. Right now i2c-gpio emulates open drain which is not 364 * optimal. 365 */ 366 __raw_writel((0 << 1) | (0 << 0), 367 EP93XX_GPIO_EEDRIVE); 368 369 i2c_register_board_info(0, devices, num); 370 gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table); 371 platform_device_register(&ep93xx_i2c_device); 372} 373 374/************************************************************************* 375 * EP93xx SPI peripheral handling 376 *************************************************************************/ 377static struct ep93xx_spi_info ep93xx_spi_master_data; 378 379static struct resource ep93xx_spi_resources[] = { 380 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18), 381 DEFINE_RES_IRQ(IRQ_EP93XX_SSP), 382}; 383 384static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32); 385 386static struct platform_device ep93xx_spi_device = { 387 .name = "ep93xx-spi", 388 .id = 0, 389 .dev = { 390 .platform_data = &ep93xx_spi_master_data, 391 .coherent_dma_mask = DMA_BIT_MASK(32), 392 .dma_mask = &ep93xx_spi_dma_mask, 393 }, 394 .num_resources = ARRAY_SIZE(ep93xx_spi_resources), 395 .resource = ep93xx_spi_resources, 396}; 397 398/** 399 * ep93xx_register_spi() - registers spi platform device 400 * @info: ep93xx board specific spi master info (__initdata) 401 * @devices: SPI devices to register (__initdata) 402 * @num: number of SPI devices to register 403 * 404 * This function registers platform device for the EP93xx SPI controller and 405 * also makes sure that SPI pins are muxed so that I2S is not using those pins. 406 */ 407void __init ep93xx_register_spi(struct ep93xx_spi_info *info, 408 struct spi_board_info *devices, int num) 409{ 410 /* 411 * When SPI is used, we need to make sure that I2S is muxed off from 412 * SPI pins. 413 */ 414 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP); 415 416 ep93xx_spi_master_data = *info; 417 spi_register_board_info(devices, num); 418 platform_device_register(&ep93xx_spi_device); 419} 420 421/************************************************************************* 422 * EP93xx LEDs 423 *************************************************************************/ 424static const struct gpio_led ep93xx_led_pins[] __initconst = { 425 { 426 .name = "platform:grled", 427 .gpio = EP93XX_GPIO_LINE_GRLED, 428 }, { 429 .name = "platform:rdled", 430 .gpio = EP93XX_GPIO_LINE_RDLED, 431 }, 432}; 433 434static const struct gpio_led_platform_data ep93xx_led_data __initconst = { 435 .num_leds = ARRAY_SIZE(ep93xx_led_pins), 436 .leds = ep93xx_led_pins, 437}; 438 439/************************************************************************* 440 * EP93xx pwm peripheral handling 441 *************************************************************************/ 442static struct resource ep93xx_pwm0_resource[] = { 443 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10), 444}; 445 446static struct platform_device ep93xx_pwm0_device = { 447 .name = "ep93xx-pwm", 448 .id = 0, 449 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource), 450 .resource = ep93xx_pwm0_resource, 451}; 452 453static struct resource ep93xx_pwm1_resource[] = { 454 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10), 455}; 456 457static struct platform_device ep93xx_pwm1_device = { 458 .name = "ep93xx-pwm", 459 .id = 1, 460 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource), 461 .resource = ep93xx_pwm1_resource, 462}; 463 464void __init ep93xx_register_pwm(int pwm0, int pwm1) 465{ 466 if (pwm0) 467 platform_device_register(&ep93xx_pwm0_device); 468 469 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */ 470 if (pwm1) 471 platform_device_register(&ep93xx_pwm1_device); 472} 473 474int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) 475{ 476 int err; 477 478 if (pdev->id == 0) { 479 err = 0; 480 } else if (pdev->id == 1) { 481 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14, 482 dev_name(&pdev->dev)); 483 if (err) 484 return err; 485 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0); 486 if (err) 487 goto fail; 488 489 /* PWM 1 output on EGPIO[14] */ 490 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG); 491 } else { 492 err = -ENODEV; 493 } 494 495 return err; 496 497fail: 498 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 499 return err; 500} 501EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio); 502 503void ep93xx_pwm_release_gpio(struct platform_device *pdev) 504{ 505 if (pdev->id == 1) { 506 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14); 507 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 508 509 /* EGPIO[14] used for GPIO */ 510 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG); 511 } 512} 513EXPORT_SYMBOL(ep93xx_pwm_release_gpio); 514 515 516/************************************************************************* 517 * EP93xx video peripheral handling 518 *************************************************************************/ 519static struct ep93xxfb_mach_info ep93xxfb_data; 520 521static struct resource ep93xx_fb_resource[] = { 522 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800), 523}; 524 525static struct platform_device ep93xx_fb_device = { 526 .name = "ep93xx-fb", 527 .id = -1, 528 .dev = { 529 .platform_data = &ep93xxfb_data, 530 .coherent_dma_mask = DMA_BIT_MASK(32), 531 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, 532 }, 533 .num_resources = ARRAY_SIZE(ep93xx_fb_resource), 534 .resource = ep93xx_fb_resource, 535}; 536 537/* The backlight use a single register in the framebuffer's register space */ 538#define EP93XX_RASTER_REG_BRIGHTNESS 0x20 539 540static struct resource ep93xx_bl_resources[] = { 541 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE + 542 EP93XX_RASTER_REG_BRIGHTNESS, 0x04), 543}; 544 545static struct platform_device ep93xx_bl_device = { 546 .name = "ep93xx-bl", 547 .id = -1, 548 .num_resources = ARRAY_SIZE(ep93xx_bl_resources), 549 .resource = ep93xx_bl_resources, 550}; 551 552/** 553 * ep93xx_register_fb - Register the framebuffer platform device. 554 * @data: platform specific framebuffer configuration (__initdata) 555 */ 556void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) 557{ 558 ep93xxfb_data = *data; 559 platform_device_register(&ep93xx_fb_device); 560 platform_device_register(&ep93xx_bl_device); 561} 562 563 564/************************************************************************* 565 * EP93xx matrix keypad peripheral handling 566 *************************************************************************/ 567static struct ep93xx_keypad_platform_data ep93xx_keypad_data; 568 569static struct resource ep93xx_keypad_resource[] = { 570 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c), 571 DEFINE_RES_IRQ(IRQ_EP93XX_KEY), 572}; 573 574static struct platform_device ep93xx_keypad_device = { 575 .name = "ep93xx-keypad", 576 .id = -1, 577 .dev = { 578 .platform_data = &ep93xx_keypad_data, 579 }, 580 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), 581 .resource = ep93xx_keypad_resource, 582}; 583 584/** 585 * ep93xx_register_keypad - Register the keypad platform device. 586 * @data: platform specific keypad configuration (__initdata) 587 */ 588void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) 589{ 590 ep93xx_keypad_data = *data; 591 platform_device_register(&ep93xx_keypad_device); 592} 593 594int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) 595{ 596 int err; 597 int i; 598 599 for (i = 0; i < 8; i++) { 600 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); 601 if (err) 602 goto fail_gpio_c; 603 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); 604 if (err) 605 goto fail_gpio_d; 606 } 607 608 /* Enable the keypad controller; GPIO ports C and D used for keypad */ 609 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | 610 EP93XX_SYSCON_DEVCFG_GONK); 611 612 return 0; 613 614fail_gpio_d: 615 gpio_free(EP93XX_GPIO_LINE_C(i)); 616fail_gpio_c: 617 for (--i; i >= 0; --i) { 618 gpio_free(EP93XX_GPIO_LINE_C(i)); 619 gpio_free(EP93XX_GPIO_LINE_D(i)); 620 } 621 return err; 622} 623EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); 624 625void ep93xx_keypad_release_gpio(struct platform_device *pdev) 626{ 627 int i; 628 629 for (i = 0; i < 8; i++) { 630 gpio_free(EP93XX_GPIO_LINE_C(i)); 631 gpio_free(EP93XX_GPIO_LINE_D(i)); 632 } 633 634 /* Disable the keypad controller; GPIO ports C and D used for GPIO */ 635 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 636 EP93XX_SYSCON_DEVCFG_GONK); 637} 638EXPORT_SYMBOL(ep93xx_keypad_release_gpio); 639 640/************************************************************************* 641 * EP93xx I2S audio peripheral handling 642 *************************************************************************/ 643static struct resource ep93xx_i2s_resource[] = { 644 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100), 645 DEFINE_RES_IRQ(IRQ_EP93XX_SAI), 646}; 647 648static struct platform_device ep93xx_i2s_device = { 649 .name = "ep93xx-i2s", 650 .id = -1, 651 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource), 652 .resource = ep93xx_i2s_resource, 653}; 654 655static struct platform_device ep93xx_pcm_device = { 656 .name = "ep93xx-pcm-audio", 657 .id = -1, 658}; 659 660void __init ep93xx_register_i2s(void) 661{ 662 platform_device_register(&ep93xx_i2s_device); 663 platform_device_register(&ep93xx_pcm_device); 664} 665 666#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \ 667 EP93XX_SYSCON_DEVCFG_I2SONAC97) 668 669#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ 670 EP93XX_SYSCON_I2SCLKDIV_SPOL) 671 672int ep93xx_i2s_acquire(void) 673{ 674 unsigned val; 675 676 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97, 677 EP93XX_SYSCON_DEVCFG_I2S_MASK); 678 679 /* 680 * This is potentially racy with the clock api for i2s_mclk, sclk and 681 * lrclk. Since the i2s driver is the only user of those clocks we 682 * rely on it to prevent parallel use of this function and the 683 * clock api for the i2s clocks. 684 */ 685 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); 686 val &= ~EP93XX_I2SCLKDIV_MASK; 687 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL; 688 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); 689 690 return 0; 691} 692EXPORT_SYMBOL(ep93xx_i2s_acquire); 693 694void ep93xx_i2s_release(void) 695{ 696 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); 697} 698EXPORT_SYMBOL(ep93xx_i2s_release); 699 700/************************************************************************* 701 * EP93xx AC97 audio peripheral handling 702 *************************************************************************/ 703static struct resource ep93xx_ac97_resources[] = { 704 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac), 705 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR), 706}; 707 708static struct platform_device ep93xx_ac97_device = { 709 .name = "ep93xx-ac97", 710 .id = -1, 711 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources), 712 .resource = ep93xx_ac97_resources, 713}; 714 715void __init ep93xx_register_ac97(void) 716{ 717 /* 718 * Make sure that the AC97 pins are not used by I2S. 719 */ 720 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97); 721 722 platform_device_register(&ep93xx_ac97_device); 723 platform_device_register(&ep93xx_pcm_device); 724} 725 726/************************************************************************* 727 * EP93xx Watchdog 728 *************************************************************************/ 729static struct resource ep93xx_wdt_resources[] = { 730 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08), 731}; 732 733static struct platform_device ep93xx_wdt_device = { 734 .name = "ep93xx-wdt", 735 .id = -1, 736 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources), 737 .resource = ep93xx_wdt_resources, 738}; 739 740/************************************************************************* 741 * EP93xx IDE 742 *************************************************************************/ 743static struct resource ep93xx_ide_resources[] = { 744 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38), 745 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3), 746}; 747 748static struct platform_device ep93xx_ide_device = { 749 .name = "ep93xx-ide", 750 .id = -1, 751 .dev = { 752 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask, 753 .coherent_dma_mask = DMA_BIT_MASK(32), 754 }, 755 .num_resources = ARRAY_SIZE(ep93xx_ide_resources), 756 .resource = ep93xx_ide_resources, 757}; 758 759void __init ep93xx_register_ide(void) 760{ 761 platform_device_register(&ep93xx_ide_device); 762} 763 764int ep93xx_ide_acquire_gpio(struct platform_device *pdev) 765{ 766 int err; 767 int i; 768 769 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev)); 770 if (err) 771 return err; 772 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev)); 773 if (err) 774 goto fail_egpio15; 775 for (i = 2; i < 8; i++) { 776 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev)); 777 if (err) 778 goto fail_gpio_e; 779 } 780 for (i = 4; i < 8; i++) { 781 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev)); 782 if (err) 783 goto fail_gpio_g; 784 } 785 for (i = 0; i < 8; i++) { 786 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev)); 787 if (err) 788 goto fail_gpio_h; 789 } 790 791 /* GPIO ports E[7:2], G[7:4] and H used by IDE */ 792 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE | 793 EP93XX_SYSCON_DEVCFG_GONIDE | 794 EP93XX_SYSCON_DEVCFG_HONIDE); 795 return 0; 796 797fail_gpio_h: 798 for (--i; i >= 0; --i) 799 gpio_free(EP93XX_GPIO_LINE_H(i)); 800 i = 8; 801fail_gpio_g: 802 for (--i; i >= 4; --i) 803 gpio_free(EP93XX_GPIO_LINE_G(i)); 804 i = 8; 805fail_gpio_e: 806 for (--i; i >= 2; --i) 807 gpio_free(EP93XX_GPIO_LINE_E(i)); 808 gpio_free(EP93XX_GPIO_LINE_EGPIO15); 809fail_egpio15: 810 gpio_free(EP93XX_GPIO_LINE_EGPIO2); 811 return err; 812} 813EXPORT_SYMBOL(ep93xx_ide_acquire_gpio); 814 815void ep93xx_ide_release_gpio(struct platform_device *pdev) 816{ 817 int i; 818 819 for (i = 2; i < 8; i++) 820 gpio_free(EP93XX_GPIO_LINE_E(i)); 821 for (i = 4; i < 8; i++) 822 gpio_free(EP93XX_GPIO_LINE_G(i)); 823 for (i = 0; i < 8; i++) 824 gpio_free(EP93XX_GPIO_LINE_H(i)); 825 gpio_free(EP93XX_GPIO_LINE_EGPIO15); 826 gpio_free(EP93XX_GPIO_LINE_EGPIO2); 827 828 829 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */ 830 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE | 831 EP93XX_SYSCON_DEVCFG_GONIDE | 832 EP93XX_SYSCON_DEVCFG_HONIDE); 833} 834EXPORT_SYMBOL(ep93xx_ide_release_gpio); 835 836/************************************************************************* 837 * EP93xx ADC 838 *************************************************************************/ 839static struct resource ep93xx_adc_resources[] = { 840 DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28), 841 DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH), 842}; 843 844static struct platform_device ep93xx_adc_device = { 845 .name = "ep93xx-adc", 846 .id = -1, 847 .num_resources = ARRAY_SIZE(ep93xx_adc_resources), 848 .resource = ep93xx_adc_resources, 849}; 850 851void __init ep93xx_register_adc(void) 852{ 853 /* Power up ADC, deactivate Touch Screen Controller */ 854 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN, 855 EP93XX_SYSCON_DEVCFG_ADCPD); 856 857 platform_device_register(&ep93xx_adc_device); 858} 859 860/************************************************************************* 861 * EP93xx Security peripheral 862 *************************************************************************/ 863 864/* 865 * The Maverick Key is 256 bits of micro fuses blown at the factory during 866 * manufacturing to uniquely identify a part. 867 * 868 * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key 869 */ 870#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x)) 871#define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400) 872#define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410) 873#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440) 874#define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450) 875#define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460) 876#define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500) 877#define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504) 878#define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520) 879#define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524) 880#define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700) 881#define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704) 882#define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708) 883#define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c) 884 885static char ep93xx_soc_id[33]; 886 887static const char __init *ep93xx_get_soc_id(void) 888{ 889 unsigned int id, id2, id3, id4, id5; 890 891 if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1) 892 return "bad Hamming code"; 893 894 id = __raw_readl(EP93XX_SECURITY_UNIQID); 895 id2 = __raw_readl(EP93XX_SECURITY_UNIQID2); 896 id3 = __raw_readl(EP93XX_SECURITY_UNIQID3); 897 id4 = __raw_readl(EP93XX_SECURITY_UNIQID4); 898 id5 = __raw_readl(EP93XX_SECURITY_UNIQID5); 899 900 if (id != id2) 901 return "invalid"; 902 903 /* Toss the unique ID into the entropy pool */ 904 add_device_randomness(&id2, 4); 905 add_device_randomness(&id3, 4); 906 add_device_randomness(&id4, 4); 907 add_device_randomness(&id5, 4); 908 909 snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id), 910 "%08x%08x%08x%08x", id2, id3, id4, id5); 911 912 return ep93xx_soc_id; 913} 914 915static const char __init *ep93xx_get_soc_rev(void) 916{ 917 int rev = ep93xx_chip_revision(); 918 919 switch (rev) { 920 case EP93XX_CHIP_REV_D0: 921 return "D0"; 922 case EP93XX_CHIP_REV_D1: 923 return "D1"; 924 case EP93XX_CHIP_REV_E0: 925 return "E0"; 926 case EP93XX_CHIP_REV_E1: 927 return "E1"; 928 case EP93XX_CHIP_REV_E2: 929 return "E2"; 930 default: 931 return "unknown"; 932 } 933} 934 935static const char __init *ep93xx_get_machine_name(void) 936{ 937 return kasprintf(GFP_KERNEL,"%s", machine_desc->name); 938} 939 940static struct device __init *ep93xx_init_soc(void) 941{ 942 struct soc_device_attribute *soc_dev_attr; 943 struct soc_device *soc_dev; 944 945 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 946 if (!soc_dev_attr) 947 return NULL; 948 949 soc_dev_attr->machine = ep93xx_get_machine_name(); 950 soc_dev_attr->family = "Cirrus Logic EP93xx"; 951 soc_dev_attr->revision = ep93xx_get_soc_rev(); 952 soc_dev_attr->soc_id = ep93xx_get_soc_id(); 953 954 soc_dev = soc_device_register(soc_dev_attr); 955 if (IS_ERR(soc_dev)) { 956 kfree(soc_dev_attr->machine); 957 kfree(soc_dev_attr); 958 return NULL; 959 } 960 961 return soc_device_to_device(soc_dev); 962} 963 964struct device __init *ep93xx_init_devices(void) 965{ 966 struct device *parent; 967 968 /* Disallow access to MaverickCrunch initially */ 969 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA); 970 971 /* Default all ports to GPIO */ 972 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 973 EP93XX_SYSCON_DEVCFG_GONK | 974 EP93XX_SYSCON_DEVCFG_EONIDE | 975 EP93XX_SYSCON_DEVCFG_GONIDE | 976 EP93XX_SYSCON_DEVCFG_HONIDE); 977 978 parent = ep93xx_init_soc(); 979 980 /* Get the GPIO working early, other devices need it */ 981 platform_device_register(&ep93xx_gpio_device); 982 983 amba_device_register(&uart1_device, &iomem_resource); 984 amba_device_register(&uart2_device, &iomem_resource); 985 amba_device_register(&uart3_device, &iomem_resource); 986 987 platform_device_register(&ep93xx_rtc_device); 988 platform_device_register(&ep93xx_ohci_device); 989 platform_device_register(&ep93xx_wdt_device); 990 991 gpio_led_register_device(-1, &ep93xx_led_data); 992 993 return parent; 994} 995 996void ep93xx_restart(enum reboot_mode mode, const char *cmd) 997{ 998 /* 999 * Set then clear the SWRST bit to initiate a software reset 1000 */ 1001 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); 1002 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); 1003 1004 while (1) 1005 ; 1006} 1007 1008void __init ep93xx_init_late(void) 1009{ 1010 crunch_init(); 1011} 1012