18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * TI DaVinci EVM board support 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Author: Kevin Hilman, Deep Root Systems, LLC 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * 2007 (c) MontaVista Software, Inc. This file is licensed under 78c2ecf20Sopenharmony_ci * the terms of the GNU General Public License version 2. This program 88c2ecf20Sopenharmony_ci * is licensed "as is" without any warranty of any kind, whether express 98c2ecf20Sopenharmony_ci * or implied. 108c2ecf20Sopenharmony_ci */ 118c2ecf20Sopenharmony_ci#include <linux/kernel.h> 128c2ecf20Sopenharmony_ci#include <linux/init.h> 138c2ecf20Sopenharmony_ci#include <linux/err.h> 148c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 158c2ecf20Sopenharmony_ci#include <linux/mtd/mtd.h> 168c2ecf20Sopenharmony_ci#include <linux/mtd/partitions.h> 178c2ecf20Sopenharmony_ci#include <linux/mtd/rawnand.h> 188c2ecf20Sopenharmony_ci#include <linux/i2c.h> 198c2ecf20Sopenharmony_ci#include <linux/gpio.h> 208c2ecf20Sopenharmony_ci#include <linux/gpio/machine.h> 218c2ecf20Sopenharmony_ci#include <linux/clk.h> 228c2ecf20Sopenharmony_ci#include <linux/dm9000.h> 238c2ecf20Sopenharmony_ci#include <linux/videodev2.h> 248c2ecf20Sopenharmony_ci#include <media/i2c/tvp514x.h> 258c2ecf20Sopenharmony_ci#include <linux/spi/spi.h> 268c2ecf20Sopenharmony_ci#include <linux/spi/eeprom.h> 278c2ecf20Sopenharmony_ci#include <linux/platform_data/gpio-davinci.h> 288c2ecf20Sopenharmony_ci#include <linux/platform_data/i2c-davinci.h> 298c2ecf20Sopenharmony_ci#include <linux/platform_data/mtd-davinci.h> 308c2ecf20Sopenharmony_ci#include <linux/platform_data/mmc-davinci.h> 318c2ecf20Sopenharmony_ci#include <linux/platform_data/usb-davinci.h> 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#include <asm/mach-types.h> 348c2ecf20Sopenharmony_ci#include <asm/mach/arch.h> 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci#include <mach/serial.h> 378c2ecf20Sopenharmony_ci#include <mach/common.h> 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci#include "davinci.h" 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci/* NOTE: this is geared for the standard config, with a socketed 428c2ecf20Sopenharmony_ci * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you 438c2ecf20Sopenharmony_ci * swap chips, maybe with a different block size, partitioning may 448c2ecf20Sopenharmony_ci * need to be changed. 458c2ecf20Sopenharmony_ci */ 468c2ecf20Sopenharmony_ci#define NAND_BLOCK_SIZE SZ_128K 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_cistatic struct mtd_partition davinci_nand_partitions[] = { 498c2ecf20Sopenharmony_ci { 508c2ecf20Sopenharmony_ci /* UBL (a few copies) plus U-Boot */ 518c2ecf20Sopenharmony_ci .name = "bootloader", 528c2ecf20Sopenharmony_ci .offset = 0, 538c2ecf20Sopenharmony_ci .size = 15 * NAND_BLOCK_SIZE, 548c2ecf20Sopenharmony_ci .mask_flags = MTD_WRITEABLE, /* force read-only */ 558c2ecf20Sopenharmony_ci }, { 568c2ecf20Sopenharmony_ci /* U-Boot environment */ 578c2ecf20Sopenharmony_ci .name = "params", 588c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 598c2ecf20Sopenharmony_ci .size = 1 * NAND_BLOCK_SIZE, 608c2ecf20Sopenharmony_ci .mask_flags = 0, 618c2ecf20Sopenharmony_ci }, { 628c2ecf20Sopenharmony_ci .name = "kernel", 638c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 648c2ecf20Sopenharmony_ci .size = SZ_4M, 658c2ecf20Sopenharmony_ci .mask_flags = 0, 668c2ecf20Sopenharmony_ci }, { 678c2ecf20Sopenharmony_ci .name = "filesystem1", 688c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 698c2ecf20Sopenharmony_ci .size = SZ_512M, 708c2ecf20Sopenharmony_ci .mask_flags = 0, 718c2ecf20Sopenharmony_ci }, { 728c2ecf20Sopenharmony_ci .name = "filesystem2", 738c2ecf20Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 748c2ecf20Sopenharmony_ci .size = MTDPART_SIZ_FULL, 758c2ecf20Sopenharmony_ci .mask_flags = 0, 768c2ecf20Sopenharmony_ci } 778c2ecf20Sopenharmony_ci /* two blocks with bad block table (and mirror) at the end */ 788c2ecf20Sopenharmony_ci}; 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_cistatic struct davinci_nand_pdata davinci_nand_data = { 818c2ecf20Sopenharmony_ci .core_chipsel = 0, 828c2ecf20Sopenharmony_ci .mask_chipsel = BIT(14), 838c2ecf20Sopenharmony_ci .parts = davinci_nand_partitions, 848c2ecf20Sopenharmony_ci .nr_parts = ARRAY_SIZE(davinci_nand_partitions), 858c2ecf20Sopenharmony_ci .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, 868c2ecf20Sopenharmony_ci .bbt_options = NAND_BBT_USE_FLASH, 878c2ecf20Sopenharmony_ci .ecc_bits = 4, 888c2ecf20Sopenharmony_ci}; 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_cistatic struct resource davinci_nand_resources[] = { 918c2ecf20Sopenharmony_ci { 928c2ecf20Sopenharmony_ci .start = DM355_ASYNC_EMIF_DATA_CE0_BASE, 938c2ecf20Sopenharmony_ci .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, 948c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 958c2ecf20Sopenharmony_ci }, { 968c2ecf20Sopenharmony_ci .start = DM355_ASYNC_EMIF_CONTROL_BASE, 978c2ecf20Sopenharmony_ci .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 988c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 998c2ecf20Sopenharmony_ci }, 1008c2ecf20Sopenharmony_ci}; 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_cistatic struct platform_device davinci_nand_device = { 1038c2ecf20Sopenharmony_ci .name = "davinci_nand", 1048c2ecf20Sopenharmony_ci .id = 0, 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(davinci_nand_resources), 1078c2ecf20Sopenharmony_ci .resource = davinci_nand_resources, 1088c2ecf20Sopenharmony_ci 1098c2ecf20Sopenharmony_ci .dev = { 1108c2ecf20Sopenharmony_ci .platform_data = &davinci_nand_data, 1118c2ecf20Sopenharmony_ci }, 1128c2ecf20Sopenharmony_ci}; 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci#define DM355_I2C_SDA_PIN GPIO_TO_PIN(0, 15) 1158c2ecf20Sopenharmony_ci#define DM355_I2C_SCL_PIN GPIO_TO_PIN(0, 14) 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_cistatic struct gpiod_lookup_table i2c_recovery_gpiod_table = { 1188c2ecf20Sopenharmony_ci .dev_id = "i2c_davinci.1", 1198c2ecf20Sopenharmony_ci .table = { 1208c2ecf20Sopenharmony_ci GPIO_LOOKUP("davinci_gpio", DM355_I2C_SDA_PIN, "sda", 1218c2ecf20Sopenharmony_ci GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), 1228c2ecf20Sopenharmony_ci GPIO_LOOKUP("davinci_gpio", DM355_I2C_SCL_PIN, "scl", 1238c2ecf20Sopenharmony_ci GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), 1248c2ecf20Sopenharmony_ci { } 1258c2ecf20Sopenharmony_ci }, 1268c2ecf20Sopenharmony_ci}; 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_cistatic struct davinci_i2c_platform_data i2c_pdata = { 1298c2ecf20Sopenharmony_ci .bus_freq = 400 /* kHz */, 1308c2ecf20Sopenharmony_ci .bus_delay = 0 /* usec */, 1318c2ecf20Sopenharmony_ci .gpio_recovery = true, 1328c2ecf20Sopenharmony_ci}; 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_cistatic int dm355evm_mmc_gpios = -EINVAL; 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_cistatic void dm355evm_mmcsd_gpios(unsigned gpio) 1378c2ecf20Sopenharmony_ci{ 1388c2ecf20Sopenharmony_ci gpio_request(gpio + 0, "mmc0_ro"); 1398c2ecf20Sopenharmony_ci gpio_request(gpio + 1, "mmc0_cd"); 1408c2ecf20Sopenharmony_ci gpio_request(gpio + 2, "mmc1_ro"); 1418c2ecf20Sopenharmony_ci gpio_request(gpio + 3, "mmc1_cd"); 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ci /* we "know" these are input-only so we don't 1448c2ecf20Sopenharmony_ci * need to call gpio_direction_input() 1458c2ecf20Sopenharmony_ci */ 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ci dm355evm_mmc_gpios = gpio; 1488c2ecf20Sopenharmony_ci} 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_cistatic struct i2c_board_info dm355evm_i2c_info[] = { 1518c2ecf20Sopenharmony_ci { I2C_BOARD_INFO("dm355evm_msp", 0x25), 1528c2ecf20Sopenharmony_ci .platform_data = dm355evm_mmcsd_gpios, 1538c2ecf20Sopenharmony_ci }, 1548c2ecf20Sopenharmony_ci /* { plus irq }, */ 1558c2ecf20Sopenharmony_ci { I2C_BOARD_INFO("tlv320aic33", 0x1b), }, 1568c2ecf20Sopenharmony_ci}; 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_cistatic void __init evm_init_i2c(void) 1598c2ecf20Sopenharmony_ci{ 1608c2ecf20Sopenharmony_ci gpiod_add_lookup_table(&i2c_recovery_gpiod_table); 1618c2ecf20Sopenharmony_ci davinci_init_i2c(&i2c_pdata); 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_ci gpio_request(5, "dm355evm_msp"); 1648c2ecf20Sopenharmony_ci gpio_direction_input(5); 1658c2ecf20Sopenharmony_ci dm355evm_i2c_info[0].irq = gpio_to_irq(5); 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci i2c_register_board_info(1, dm355evm_i2c_info, 1688c2ecf20Sopenharmony_ci ARRAY_SIZE(dm355evm_i2c_info)); 1698c2ecf20Sopenharmony_ci} 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_cistatic struct resource dm355evm_dm9000_rsrc[] = { 1728c2ecf20Sopenharmony_ci { 1738c2ecf20Sopenharmony_ci /* addr */ 1748c2ecf20Sopenharmony_ci .start = 0x04014000, 1758c2ecf20Sopenharmony_ci .end = 0x04014001, 1768c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 1778c2ecf20Sopenharmony_ci }, { 1788c2ecf20Sopenharmony_ci /* data */ 1798c2ecf20Sopenharmony_ci .start = 0x04014002, 1808c2ecf20Sopenharmony_ci .end = 0x04014003, 1818c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 1828c2ecf20Sopenharmony_ci }, { 1838c2ecf20Sopenharmony_ci .flags = IORESOURCE_IRQ 1848c2ecf20Sopenharmony_ci | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */, 1858c2ecf20Sopenharmony_ci }, 1868c2ecf20Sopenharmony_ci}; 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_cistatic struct dm9000_plat_data dm335evm_dm9000_platdata; 1898c2ecf20Sopenharmony_ci 1908c2ecf20Sopenharmony_cistatic struct platform_device dm355evm_dm9000 = { 1918c2ecf20Sopenharmony_ci .name = "dm9000", 1928c2ecf20Sopenharmony_ci .id = -1, 1938c2ecf20Sopenharmony_ci .resource = dm355evm_dm9000_rsrc, 1948c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc), 1958c2ecf20Sopenharmony_ci .dev = { 1968c2ecf20Sopenharmony_ci .platform_data = &dm335evm_dm9000_platdata, 1978c2ecf20Sopenharmony_ci }, 1988c2ecf20Sopenharmony_ci}; 1998c2ecf20Sopenharmony_ci 2008c2ecf20Sopenharmony_cistatic struct tvp514x_platform_data tvp5146_pdata = { 2018c2ecf20Sopenharmony_ci .clk_polarity = 0, 2028c2ecf20Sopenharmony_ci .hs_polarity = 1, 2038c2ecf20Sopenharmony_ci .vs_polarity = 1 2048c2ecf20Sopenharmony_ci}; 2058c2ecf20Sopenharmony_ci 2068c2ecf20Sopenharmony_ci#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) 2078c2ecf20Sopenharmony_ci/* Inputs available at the TVP5146 */ 2088c2ecf20Sopenharmony_cistatic struct v4l2_input tvp5146_inputs[] = { 2098c2ecf20Sopenharmony_ci { 2108c2ecf20Sopenharmony_ci .index = 0, 2118c2ecf20Sopenharmony_ci .name = "Composite", 2128c2ecf20Sopenharmony_ci .type = V4L2_INPUT_TYPE_CAMERA, 2138c2ecf20Sopenharmony_ci .std = TVP514X_STD_ALL, 2148c2ecf20Sopenharmony_ci }, 2158c2ecf20Sopenharmony_ci { 2168c2ecf20Sopenharmony_ci .index = 1, 2178c2ecf20Sopenharmony_ci .name = "S-Video", 2188c2ecf20Sopenharmony_ci .type = V4L2_INPUT_TYPE_CAMERA, 2198c2ecf20Sopenharmony_ci .std = TVP514X_STD_ALL, 2208c2ecf20Sopenharmony_ci }, 2218c2ecf20Sopenharmony_ci}; 2228c2ecf20Sopenharmony_ci 2238c2ecf20Sopenharmony_ci/* 2248c2ecf20Sopenharmony_ci * this is the route info for connecting each input to decoder 2258c2ecf20Sopenharmony_ci * ouput that goes to vpfe. There is a one to one correspondence 2268c2ecf20Sopenharmony_ci * with tvp5146_inputs 2278c2ecf20Sopenharmony_ci */ 2288c2ecf20Sopenharmony_cistatic struct vpfe_route tvp5146_routes[] = { 2298c2ecf20Sopenharmony_ci { 2308c2ecf20Sopenharmony_ci .input = INPUT_CVBS_VI2B, 2318c2ecf20Sopenharmony_ci .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, 2328c2ecf20Sopenharmony_ci }, 2338c2ecf20Sopenharmony_ci { 2348c2ecf20Sopenharmony_ci .input = INPUT_SVIDEO_VI2C_VI1C, 2358c2ecf20Sopenharmony_ci .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, 2368c2ecf20Sopenharmony_ci }, 2378c2ecf20Sopenharmony_ci}; 2388c2ecf20Sopenharmony_ci 2398c2ecf20Sopenharmony_cistatic struct vpfe_subdev_info vpfe_sub_devs[] = { 2408c2ecf20Sopenharmony_ci { 2418c2ecf20Sopenharmony_ci .name = "tvp5146", 2428c2ecf20Sopenharmony_ci .grp_id = 0, 2438c2ecf20Sopenharmony_ci .num_inputs = ARRAY_SIZE(tvp5146_inputs), 2448c2ecf20Sopenharmony_ci .inputs = tvp5146_inputs, 2458c2ecf20Sopenharmony_ci .routes = tvp5146_routes, 2468c2ecf20Sopenharmony_ci .can_route = 1, 2478c2ecf20Sopenharmony_ci .ccdc_if_params = { 2488c2ecf20Sopenharmony_ci .if_type = VPFE_BT656, 2498c2ecf20Sopenharmony_ci .hdpol = VPFE_PINPOL_POSITIVE, 2508c2ecf20Sopenharmony_ci .vdpol = VPFE_PINPOL_POSITIVE, 2518c2ecf20Sopenharmony_ci }, 2528c2ecf20Sopenharmony_ci .board_info = { 2538c2ecf20Sopenharmony_ci I2C_BOARD_INFO("tvp5146", 0x5d), 2548c2ecf20Sopenharmony_ci .platform_data = &tvp5146_pdata, 2558c2ecf20Sopenharmony_ci }, 2568c2ecf20Sopenharmony_ci } 2578c2ecf20Sopenharmony_ci}; 2588c2ecf20Sopenharmony_ci 2598c2ecf20Sopenharmony_cistatic struct vpfe_config vpfe_cfg = { 2608c2ecf20Sopenharmony_ci .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), 2618c2ecf20Sopenharmony_ci .i2c_adapter_id = 1, 2628c2ecf20Sopenharmony_ci .sub_devs = vpfe_sub_devs, 2638c2ecf20Sopenharmony_ci .card_name = "DM355 EVM", 2648c2ecf20Sopenharmony_ci .ccdc = "DM355 CCDC", 2658c2ecf20Sopenharmony_ci}; 2668c2ecf20Sopenharmony_ci 2678c2ecf20Sopenharmony_ci/* venc standards timings */ 2688c2ecf20Sopenharmony_cistatic struct vpbe_enc_mode_info dm355evm_enc_preset_timing[] = { 2698c2ecf20Sopenharmony_ci { 2708c2ecf20Sopenharmony_ci .name = "ntsc", 2718c2ecf20Sopenharmony_ci .timings_type = VPBE_ENC_STD, 2728c2ecf20Sopenharmony_ci .std_id = V4L2_STD_NTSC, 2738c2ecf20Sopenharmony_ci .interlaced = 1, 2748c2ecf20Sopenharmony_ci .xres = 720, 2758c2ecf20Sopenharmony_ci .yres = 480, 2768c2ecf20Sopenharmony_ci .aspect = {11, 10}, 2778c2ecf20Sopenharmony_ci .fps = {30000, 1001}, 2788c2ecf20Sopenharmony_ci .left_margin = 0x79, 2798c2ecf20Sopenharmony_ci .upper_margin = 0x10, 2808c2ecf20Sopenharmony_ci }, 2818c2ecf20Sopenharmony_ci { 2828c2ecf20Sopenharmony_ci .name = "pal", 2838c2ecf20Sopenharmony_ci .timings_type = VPBE_ENC_STD, 2848c2ecf20Sopenharmony_ci .std_id = V4L2_STD_PAL, 2858c2ecf20Sopenharmony_ci .interlaced = 1, 2868c2ecf20Sopenharmony_ci .xres = 720, 2878c2ecf20Sopenharmony_ci .yres = 576, 2888c2ecf20Sopenharmony_ci .aspect = {54, 59}, 2898c2ecf20Sopenharmony_ci .fps = {25, 1}, 2908c2ecf20Sopenharmony_ci .left_margin = 0x7E, 2918c2ecf20Sopenharmony_ci .upper_margin = 0x16 2928c2ecf20Sopenharmony_ci }, 2938c2ecf20Sopenharmony_ci}; 2948c2ecf20Sopenharmony_ci 2958c2ecf20Sopenharmony_ci#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) 2968c2ecf20Sopenharmony_ci 2978c2ecf20Sopenharmony_ci/* 2988c2ecf20Sopenharmony_ci * The outputs available from VPBE + ecnoders. Keep the 2998c2ecf20Sopenharmony_ci * the order same as that of encoders. First those from venc followed by that 3008c2ecf20Sopenharmony_ci * from encoders. Index in the output refers to index on a particular encoder. 3018c2ecf20Sopenharmony_ci * Driver uses this index to pass it to encoder when it supports more than 3028c2ecf20Sopenharmony_ci * one output. Application uses index of the array to set an output. 3038c2ecf20Sopenharmony_ci */ 3048c2ecf20Sopenharmony_cistatic struct vpbe_output dm355evm_vpbe_outputs[] = { 3058c2ecf20Sopenharmony_ci { 3068c2ecf20Sopenharmony_ci .output = { 3078c2ecf20Sopenharmony_ci .index = 0, 3088c2ecf20Sopenharmony_ci .name = "Composite", 3098c2ecf20Sopenharmony_ci .type = V4L2_OUTPUT_TYPE_ANALOG, 3108c2ecf20Sopenharmony_ci .std = VENC_STD_ALL, 3118c2ecf20Sopenharmony_ci .capabilities = V4L2_OUT_CAP_STD, 3128c2ecf20Sopenharmony_ci }, 3138c2ecf20Sopenharmony_ci .subdev_name = DM355_VPBE_VENC_SUBDEV_NAME, 3148c2ecf20Sopenharmony_ci .default_mode = "ntsc", 3158c2ecf20Sopenharmony_ci .num_modes = ARRAY_SIZE(dm355evm_enc_preset_timing), 3168c2ecf20Sopenharmony_ci .modes = dm355evm_enc_preset_timing, 3178c2ecf20Sopenharmony_ci .if_params = MEDIA_BUS_FMT_FIXED, 3188c2ecf20Sopenharmony_ci }, 3198c2ecf20Sopenharmony_ci}; 3208c2ecf20Sopenharmony_ci 3218c2ecf20Sopenharmony_cistatic struct vpbe_config dm355evm_display_cfg = { 3228c2ecf20Sopenharmony_ci .module_name = "dm355-vpbe-display", 3238c2ecf20Sopenharmony_ci .i2c_adapter_id = 1, 3248c2ecf20Sopenharmony_ci .osd = { 3258c2ecf20Sopenharmony_ci .module_name = DM355_VPBE_OSD_SUBDEV_NAME, 3268c2ecf20Sopenharmony_ci }, 3278c2ecf20Sopenharmony_ci .venc = { 3288c2ecf20Sopenharmony_ci .module_name = DM355_VPBE_VENC_SUBDEV_NAME, 3298c2ecf20Sopenharmony_ci }, 3308c2ecf20Sopenharmony_ci .num_outputs = ARRAY_SIZE(dm355evm_vpbe_outputs), 3318c2ecf20Sopenharmony_ci .outputs = dm355evm_vpbe_outputs, 3328c2ecf20Sopenharmony_ci}; 3338c2ecf20Sopenharmony_ci 3348c2ecf20Sopenharmony_cistatic struct platform_device *davinci_evm_devices[] __initdata = { 3358c2ecf20Sopenharmony_ci &dm355evm_dm9000, 3368c2ecf20Sopenharmony_ci &davinci_nand_device, 3378c2ecf20Sopenharmony_ci}; 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_cistatic void __init dm355_evm_map_io(void) 3408c2ecf20Sopenharmony_ci{ 3418c2ecf20Sopenharmony_ci dm355_init(); 3428c2ecf20Sopenharmony_ci} 3438c2ecf20Sopenharmony_ci 3448c2ecf20Sopenharmony_cistatic int dm355evm_mmc_get_cd(int module) 3458c2ecf20Sopenharmony_ci{ 3468c2ecf20Sopenharmony_ci if (!gpio_is_valid(dm355evm_mmc_gpios)) 3478c2ecf20Sopenharmony_ci return -ENXIO; 3488c2ecf20Sopenharmony_ci /* low == card present */ 3498c2ecf20Sopenharmony_ci return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1); 3508c2ecf20Sopenharmony_ci} 3518c2ecf20Sopenharmony_ci 3528c2ecf20Sopenharmony_cistatic int dm355evm_mmc_get_ro(int module) 3538c2ecf20Sopenharmony_ci{ 3548c2ecf20Sopenharmony_ci if (!gpio_is_valid(dm355evm_mmc_gpios)) 3558c2ecf20Sopenharmony_ci return -ENXIO; 3568c2ecf20Sopenharmony_ci /* high == card's write protect switch active */ 3578c2ecf20Sopenharmony_ci return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0); 3588c2ecf20Sopenharmony_ci} 3598c2ecf20Sopenharmony_ci 3608c2ecf20Sopenharmony_cistatic struct davinci_mmc_config dm355evm_mmc_config = { 3618c2ecf20Sopenharmony_ci .get_cd = dm355evm_mmc_get_cd, 3628c2ecf20Sopenharmony_ci .get_ro = dm355evm_mmc_get_ro, 3638c2ecf20Sopenharmony_ci .wires = 4, 3648c2ecf20Sopenharmony_ci .max_freq = 50000000, 3658c2ecf20Sopenharmony_ci .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 3668c2ecf20Sopenharmony_ci}; 3678c2ecf20Sopenharmony_ci 3688c2ecf20Sopenharmony_ci/* Don't connect anything to J10 unless you're only using USB host 3698c2ecf20Sopenharmony_ci * mode *and* have to do so with some kind of gender-bender. If 3708c2ecf20Sopenharmony_ci * you have proper Mini-B or Mini-A cables (or Mini-A adapters) 3718c2ecf20Sopenharmony_ci * the ID pin won't need any help. 3728c2ecf20Sopenharmony_ci */ 3738c2ecf20Sopenharmony_ci#define USB_ID_VALUE 1 /* ID pulled low */ 3748c2ecf20Sopenharmony_ci 3758c2ecf20Sopenharmony_cistatic struct spi_eeprom at25640a = { 3768c2ecf20Sopenharmony_ci .byte_len = SZ_64K / 8, 3778c2ecf20Sopenharmony_ci .name = "at25640a", 3788c2ecf20Sopenharmony_ci .page_size = 32, 3798c2ecf20Sopenharmony_ci .flags = EE_ADDR2, 3808c2ecf20Sopenharmony_ci}; 3818c2ecf20Sopenharmony_ci 3828c2ecf20Sopenharmony_cistatic const struct spi_board_info dm355_evm_spi_info[] __initconst = { 3838c2ecf20Sopenharmony_ci { 3848c2ecf20Sopenharmony_ci .modalias = "at25", 3858c2ecf20Sopenharmony_ci .platform_data = &at25640a, 3868c2ecf20Sopenharmony_ci .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */ 3878c2ecf20Sopenharmony_ci .bus_num = 0, 3888c2ecf20Sopenharmony_ci .chip_select = 0, 3898c2ecf20Sopenharmony_ci .mode = SPI_MODE_0, 3908c2ecf20Sopenharmony_ci }, 3918c2ecf20Sopenharmony_ci}; 3928c2ecf20Sopenharmony_ci 3938c2ecf20Sopenharmony_cistatic __init void dm355_evm_init(void) 3948c2ecf20Sopenharmony_ci{ 3958c2ecf20Sopenharmony_ci struct clk *aemif; 3968c2ecf20Sopenharmony_ci int ret; 3978c2ecf20Sopenharmony_ci 3988c2ecf20Sopenharmony_ci dm355_register_clocks(); 3998c2ecf20Sopenharmony_ci 4008c2ecf20Sopenharmony_ci ret = dm355_gpio_register(); 4018c2ecf20Sopenharmony_ci if (ret) 4028c2ecf20Sopenharmony_ci pr_warn("%s: GPIO init failed: %d\n", __func__, ret); 4038c2ecf20Sopenharmony_ci 4048c2ecf20Sopenharmony_ci gpio_request(1, "dm9000"); 4058c2ecf20Sopenharmony_ci gpio_direction_input(1); 4068c2ecf20Sopenharmony_ci dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1); 4078c2ecf20Sopenharmony_ci 4088c2ecf20Sopenharmony_ci aemif = clk_get(&dm355evm_dm9000.dev, "aemif"); 4098c2ecf20Sopenharmony_ci if (!WARN(IS_ERR(aemif), "unable to get AEMIF clock\n")) 4108c2ecf20Sopenharmony_ci clk_prepare_enable(aemif); 4118c2ecf20Sopenharmony_ci 4128c2ecf20Sopenharmony_ci platform_add_devices(davinci_evm_devices, 4138c2ecf20Sopenharmony_ci ARRAY_SIZE(davinci_evm_devices)); 4148c2ecf20Sopenharmony_ci evm_init_i2c(); 4158c2ecf20Sopenharmony_ci davinci_serial_init(dm355_serial_device); 4168c2ecf20Sopenharmony_ci 4178c2ecf20Sopenharmony_ci /* NOTE: NAND flash timings set by the UBL are slower than 4188c2ecf20Sopenharmony_ci * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204 4198c2ecf20Sopenharmony_ci * but could be 0x0400008c for about 25% faster page reads. 4208c2ecf20Sopenharmony_ci */ 4218c2ecf20Sopenharmony_ci 4228c2ecf20Sopenharmony_ci gpio_request(2, "usb_id_toggle"); 4238c2ecf20Sopenharmony_ci gpio_direction_output(2, USB_ID_VALUE); 4248c2ecf20Sopenharmony_ci /* irlml6401 switches over 1A in under 8 msec */ 4258c2ecf20Sopenharmony_ci davinci_setup_usb(1000, 8); 4268c2ecf20Sopenharmony_ci 4278c2ecf20Sopenharmony_ci davinci_setup_mmc(0, &dm355evm_mmc_config); 4288c2ecf20Sopenharmony_ci davinci_setup_mmc(1, &dm355evm_mmc_config); 4298c2ecf20Sopenharmony_ci 4308c2ecf20Sopenharmony_ci dm355_init_video(&vpfe_cfg, &dm355evm_display_cfg); 4318c2ecf20Sopenharmony_ci 4328c2ecf20Sopenharmony_ci dm355_init_spi0(BIT(0), dm355_evm_spi_info, 4338c2ecf20Sopenharmony_ci ARRAY_SIZE(dm355_evm_spi_info)); 4348c2ecf20Sopenharmony_ci 4358c2ecf20Sopenharmony_ci /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */ 4368c2ecf20Sopenharmony_ci dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN); 4378c2ecf20Sopenharmony_ci} 4388c2ecf20Sopenharmony_ci 4398c2ecf20Sopenharmony_ciMACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") 4408c2ecf20Sopenharmony_ci .atag_offset = 0x100, 4418c2ecf20Sopenharmony_ci .map_io = dm355_evm_map_io, 4428c2ecf20Sopenharmony_ci .init_irq = dm355_init_irq, 4438c2ecf20Sopenharmony_ci .init_time = dm355_init_time, 4448c2ecf20Sopenharmony_ci .init_machine = dm355_evm_init, 4458c2ecf20Sopenharmony_ci .init_late = davinci_init_late, 4468c2ecf20Sopenharmony_ci .dma_zone_size = SZ_128M, 4478c2ecf20Sopenharmony_ciMACHINE_END 448