1/* 2 * TI DA830/OMAP L137 EVM board 3 * 4 * Author: Mark A. Greer <mgreer@mvista.com> 5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c 6 * 7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under 8 * the terms of the GNU General Public License version 2. This program 9 * is licensed "as is" without any warranty of any kind, whether express 10 * or implied. 11 */ 12#include <linux/kernel.h> 13#include <linux/init.h> 14#include <linux/console.h> 15#include <linux/interrupt.h> 16#include <linux/gpio.h> 17#include <linux/gpio/machine.h> 18#include <linux/platform_device.h> 19#include <linux/i2c.h> 20#include <linux/platform_data/pcf857x.h> 21#include <linux/property.h> 22#include <linux/mtd/mtd.h> 23#include <linux/mtd/partitions.h> 24#include <linux/spi/spi.h> 25#include <linux/spi/flash.h> 26#include <linux/platform_data/gpio-davinci.h> 27#include <linux/platform_data/mtd-davinci.h> 28#include <linux/platform_data/mtd-davinci-aemif.h> 29#include <linux/platform_data/spi-davinci.h> 30#include <linux/platform_data/usb-davinci.h> 31#include <linux/platform_data/ti-aemif.h> 32#include <linux/regulator/fixed.h> 33#include <linux/regulator/machine.h> 34#include <linux/nvmem-provider.h> 35 36#include <asm/mach-types.h> 37#include <asm/mach/arch.h> 38 39#include <mach/common.h> 40#include <mach/mux.h> 41#include <mach/da8xx.h> 42 43#include "irqs.h" 44 45#define DA830_EVM_PHY_ID "" 46/* 47 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. 48 */ 49#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15) 50#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4) 51 52static const short da830_evm_usb11_pins[] = { 53 DA830_GPIO1_15, DA830_GPIO2_4, 54 -1 55}; 56 57static struct regulator_consumer_supply da830_evm_usb_supplies[] = { 58 REGULATOR_SUPPLY("vbus", NULL), 59}; 60 61static struct regulator_init_data da830_evm_usb_vbus_data = { 62 .consumer_supplies = da830_evm_usb_supplies, 63 .num_consumer_supplies = ARRAY_SIZE(da830_evm_usb_supplies), 64 .constraints = { 65 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 66 }, 67}; 68 69static struct fixed_voltage_config da830_evm_usb_vbus = { 70 .supply_name = "vbus", 71 .microvolts = 33000000, 72 .init_data = &da830_evm_usb_vbus_data, 73}; 74 75static struct platform_device da830_evm_usb_vbus_device = { 76 .name = "reg-fixed-voltage", 77 .id = 0, 78 .dev = { 79 .platform_data = &da830_evm_usb_vbus, 80 }, 81}; 82 83static struct gpiod_lookup_table da830_evm_usb_oc_gpio_lookup = { 84 .dev_id = "ohci-da8xx", 85 .table = { 86 GPIO_LOOKUP("davinci_gpio", ON_BD_USB_OVC, "oc", 0), 87 { } 88 }, 89}; 90 91static struct gpiod_lookup_table da830_evm_usb_vbus_gpio_lookup = { 92 .dev_id = "reg-fixed-voltage.0", 93 .table = { 94 GPIO_LOOKUP("davinci_gpio", ON_BD_USB_DRV, NULL, 0), 95 { } 96 }, 97}; 98 99static struct gpiod_lookup_table *da830_evm_usb_gpio_lookups[] = { 100 &da830_evm_usb_oc_gpio_lookup, 101 &da830_evm_usb_vbus_gpio_lookup, 102}; 103 104static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = { 105 /* TPS2065 switch @ 5V */ 106 .potpgt = (3 + 1) / 2, /* 3 ms max */ 107}; 108 109static __init void da830_evm_usb_init(void) 110{ 111 int ret; 112 113 ret = da8xx_register_usb_phy_clocks(); 114 if (ret) 115 pr_warn("%s: USB PHY CLK registration failed: %d\n", 116 __func__, ret); 117 118 gpiod_add_lookup_tables(da830_evm_usb_gpio_lookups, 119 ARRAY_SIZE(da830_evm_usb_gpio_lookups)); 120 121 ret = da8xx_register_usb_phy(); 122 if (ret) 123 pr_warn("%s: USB PHY registration failed: %d\n", 124 __func__, ret); 125 126 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS); 127 if (ret) 128 pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret); 129 else { 130 /* 131 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A), 132 * with the power on to power good time of 3 ms. 133 */ 134 ret = da8xx_register_usb20(1000, 3); 135 if (ret) 136 pr_warn("%s: USB 2.0 registration failed: %d\n", 137 __func__, ret); 138 } 139 140 ret = davinci_cfg_reg_list(da830_evm_usb11_pins); 141 if (ret) { 142 pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); 143 return; 144 } 145 146 ret = platform_device_register(&da830_evm_usb_vbus_device); 147 if (ret) { 148 pr_warn("%s: Unable to register the vbus supply\n", __func__); 149 return; 150 } 151 152 ret = da8xx_register_usb11(&da830_evm_usb11_pdata); 153 if (ret) 154 pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret); 155} 156 157static const short da830_evm_mcasp1_pins[] = { 158 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1, 159 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5, 160 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10, 161 DA830_AXR1_11, 162 -1 163}; 164 165static u8 da830_iis_serializer_direction[] = { 166 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, 167 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, 168 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, 169}; 170 171static struct snd_platform_data da830_evm_snd_data = { 172 .tx_dma_offset = 0x2000, 173 .rx_dma_offset = 0x2000, 174 .op_mode = DAVINCI_MCASP_IIS_MODE, 175 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), 176 .tdm_slots = 2, 177 .serial_dir = da830_iis_serializer_direction, 178 .asp_chan_q = EVENTQ_0, 179 .version = MCASP_VERSION_2, 180 .txnumevt = 1, 181 .rxnumevt = 1, 182}; 183 184/* 185 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS. 186 */ 187static const short da830_evm_mmc_sd_pins[] = { 188 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, 189 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5, 190 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK, 191 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2, 192 -1 193}; 194 195#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1) 196#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2) 197 198static struct gpiod_lookup_table mmc_gpios_table = { 199 .dev_id = "da830-mmc.0", 200 .table = { 201 /* gpio chip 1 contains gpio range 32-63 */ 202 GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_CD_PIN, "cd", 203 GPIO_ACTIVE_LOW), 204 GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_WP_PIN, "wp", 205 GPIO_ACTIVE_LOW), 206 { } 207 }, 208}; 209 210static struct davinci_mmc_config da830_evm_mmc_config = { 211 .wires = 8, 212 .max_freq = 50000000, 213 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 214}; 215 216static inline void da830_evm_init_mmc(void) 217{ 218 int ret; 219 220 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins); 221 if (ret) { 222 pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret); 223 return; 224 } 225 226 gpiod_add_lookup_table(&mmc_gpios_table); 227 228 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config); 229 if (ret) { 230 pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret); 231 gpiod_remove_lookup_table(&mmc_gpios_table); 232 } 233} 234 235#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI) 236 237#ifdef CONFIG_DA830_UI_NAND 238static struct mtd_partition da830_evm_nand_partitions[] = { 239 /* bootloader (U-Boot, etc) in first sector */ 240 [0] = { 241 .name = "bootloader", 242 .offset = 0, 243 .size = SZ_128K, 244 .mask_flags = MTD_WRITEABLE, /* force read-only */ 245 }, 246 /* bootloader params in the next sector */ 247 [1] = { 248 .name = "params", 249 .offset = MTDPART_OFS_APPEND, 250 .size = SZ_128K, 251 .mask_flags = MTD_WRITEABLE, /* force read-only */ 252 }, 253 /* kernel */ 254 [2] = { 255 .name = "kernel", 256 .offset = MTDPART_OFS_APPEND, 257 .size = SZ_2M, 258 .mask_flags = 0, 259 }, 260 /* file system */ 261 [3] = { 262 .name = "filesystem", 263 .offset = MTDPART_OFS_APPEND, 264 .size = MTDPART_SIZ_FULL, 265 .mask_flags = 0, 266 } 267}; 268 269/* flash bbt descriptors */ 270static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' }; 271static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' }; 272 273static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = { 274 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | 275 NAND_BBT_WRITE | NAND_BBT_2BIT | 276 NAND_BBT_VERSION | NAND_BBT_PERCHIP, 277 .offs = 2, 278 .len = 4, 279 .veroffs = 16, 280 .maxblocks = 4, 281 .pattern = da830_evm_nand_bbt_pattern 282}; 283 284static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = { 285 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | 286 NAND_BBT_WRITE | NAND_BBT_2BIT | 287 NAND_BBT_VERSION | NAND_BBT_PERCHIP, 288 .offs = 2, 289 .len = 4, 290 .veroffs = 16, 291 .maxblocks = 4, 292 .pattern = da830_evm_nand_mirror_pattern 293}; 294 295static struct davinci_aemif_timing da830_evm_nandflash_timing = { 296 .wsetup = 24, 297 .wstrobe = 21, 298 .whold = 14, 299 .rsetup = 19, 300 .rstrobe = 50, 301 .rhold = 0, 302 .ta = 20, 303}; 304 305static struct davinci_nand_pdata da830_evm_nand_pdata = { 306 .core_chipsel = 1, 307 .parts = da830_evm_nand_partitions, 308 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions), 309 .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST, 310 .ecc_bits = 4, 311 .bbt_options = NAND_BBT_USE_FLASH, 312 .bbt_td = &da830_evm_nand_bbt_main_descr, 313 .bbt_md = &da830_evm_nand_bbt_mirror_descr, 314 .timing = &da830_evm_nandflash_timing, 315}; 316 317static struct resource da830_evm_nand_resources[] = { 318 [0] = { /* First memory resource is NAND I/O window */ 319 .start = DA8XX_AEMIF_CS3_BASE, 320 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1, 321 .flags = IORESOURCE_MEM, 322 }, 323 [1] = { /* Second memory resource is AEMIF control registers */ 324 .start = DA8XX_AEMIF_CTL_BASE, 325 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, 326 .flags = IORESOURCE_MEM, 327 }, 328}; 329 330static struct platform_device da830_evm_aemif_devices[] = { 331 { 332 .name = "davinci_nand", 333 .id = 1, 334 .dev = { 335 .platform_data = &da830_evm_nand_pdata, 336 }, 337 .num_resources = ARRAY_SIZE(da830_evm_nand_resources), 338 .resource = da830_evm_nand_resources, 339 }, 340}; 341 342static struct resource da830_evm_aemif_resource[] = { 343 { 344 .start = DA8XX_AEMIF_CTL_BASE, 345 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, 346 .flags = IORESOURCE_MEM, 347 }, 348}; 349 350static struct aemif_abus_data da830_evm_aemif_abus_data[] = { 351 { 352 .cs = 3, 353 }, 354}; 355 356static struct aemif_platform_data da830_evm_aemif_pdata = { 357 .abus_data = da830_evm_aemif_abus_data, 358 .num_abus_data = ARRAY_SIZE(da830_evm_aemif_abus_data), 359 .sub_devices = da830_evm_aemif_devices, 360 .num_sub_devices = ARRAY_SIZE(da830_evm_aemif_devices), 361 .cs_offset = 2, 362}; 363 364static struct platform_device da830_evm_aemif_device = { 365 .name = "ti-aemif", 366 .id = -1, 367 .dev = { 368 .platform_data = &da830_evm_aemif_pdata, 369 }, 370 .resource = da830_evm_aemif_resource, 371 .num_resources = ARRAY_SIZE(da830_evm_aemif_resource), 372}; 373 374/* 375 * UI board NAND/NOR flashes only use 8-bit data bus. 376 */ 377static const short da830_evm_emif25_pins[] = { 378 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3, 379 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7, 380 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3, 381 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7, 382 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11, 383 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE, 384 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0, 385 -1 386}; 387 388static inline void da830_evm_init_nand(int mux_mode) 389{ 390 int ret; 391 392 if (HAS_MMC) { 393 pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n" 394 "\tDisable MMC/SD for NAND support\n"); 395 return; 396 } 397 398 ret = davinci_cfg_reg_list(da830_evm_emif25_pins); 399 if (ret) 400 pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret); 401 402 ret = platform_device_register(&da830_evm_aemif_device); 403 if (ret) 404 pr_warn("%s: AEMIF device not registered\n", __func__); 405 406 gpio_direction_output(mux_mode, 1); 407} 408#else 409static inline void da830_evm_init_nand(int mux_mode) { } 410#endif 411 412#ifdef CONFIG_DA830_UI_LCD 413static inline void da830_evm_init_lcdc(int mux_mode) 414{ 415 int ret; 416 417 ret = davinci_cfg_reg_list(da830_lcdcntl_pins); 418 if (ret) 419 pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret); 420 421 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata); 422 if (ret) 423 pr_warn("%s: lcd setup failed: %d\n", __func__, ret); 424 425 gpio_direction_output(mux_mode, 0); 426} 427#else 428static inline void da830_evm_init_lcdc(int mux_mode) { } 429#endif 430 431static struct nvmem_cell_info da830_evm_nvmem_cells[] = { 432 { 433 .name = "macaddr", 434 .offset = 0x7f00, 435 .bytes = ETH_ALEN, 436 } 437}; 438 439static struct nvmem_cell_table da830_evm_nvmem_cell_table = { 440 .nvmem_name = "1-00500", 441 .cells = da830_evm_nvmem_cells, 442 .ncells = ARRAY_SIZE(da830_evm_nvmem_cells), 443}; 444 445static struct nvmem_cell_lookup da830_evm_nvmem_cell_lookup = { 446 .nvmem_name = "1-00500", 447 .cell_name = "macaddr", 448 .dev_id = "davinci_emac.1", 449 .con_id = "mac-address", 450}; 451 452static const struct property_entry da830_evm_i2c_eeprom_properties[] = { 453 PROPERTY_ENTRY_U32("pagesize", 64), 454 { } 455}; 456 457static int __init da830_evm_ui_expander_setup(struct i2c_client *client, 458 int gpio, unsigned ngpio, void *context) 459{ 460 gpio_request(gpio + 6, "UI MUX_MODE"); 461 462 /* Drive mux mode low to match the default without UI card */ 463 gpio_direction_output(gpio + 6, 0); 464 465 da830_evm_init_lcdc(gpio + 6); 466 467 da830_evm_init_nand(gpio + 6); 468 469 return 0; 470} 471 472static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio, 473 unsigned ngpio, void *context) 474{ 475 gpio_free(gpio + 6); 476 return 0; 477} 478 479static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = { 480 .gpio_base = DAVINCI_N_GPIO, 481 .setup = da830_evm_ui_expander_setup, 482 .teardown = da830_evm_ui_expander_teardown, 483}; 484 485static struct i2c_board_info __initdata da830_evm_i2c_devices[] = { 486 { 487 I2C_BOARD_INFO("24c256", 0x50), 488 .properties = da830_evm_i2c_eeprom_properties, 489 }, 490 { 491 I2C_BOARD_INFO("tlv320aic3x", 0x18), 492 }, 493 { 494 I2C_BOARD_INFO("pcf8574", 0x3f), 495 .platform_data = &da830_evm_ui_expander_info, 496 }, 497}; 498 499static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = { 500 .bus_freq = 100, /* kHz */ 501 .bus_delay = 0, /* usec */ 502}; 503 504/* 505 * The following EDMA channels/slots are not being used by drivers (for 506 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence 507 * they are being reserved for codecs on the DSP side. 508 */ 509static const s16 da830_dma_rsv_chans[][2] = { 510 /* (offset, number) */ 511 { 8, 2}, 512 {12, 2}, 513 {24, 4}, 514 {30, 2}, 515 {-1, -1} 516}; 517 518static const s16 da830_dma_rsv_slots[][2] = { 519 /* (offset, number) */ 520 { 8, 2}, 521 {12, 2}, 522 {24, 4}, 523 {30, 26}, 524 {-1, -1} 525}; 526 527static struct edma_rsv_info da830_edma_rsv[] = { 528 { 529 .rsv_chans = da830_dma_rsv_chans, 530 .rsv_slots = da830_dma_rsv_slots, 531 }, 532}; 533 534static struct mtd_partition da830evm_spiflash_part[] = { 535 [0] = { 536 .name = "DSP-UBL", 537 .offset = 0, 538 .size = SZ_8K, 539 .mask_flags = MTD_WRITEABLE, 540 }, 541 [1] = { 542 .name = "ARM-UBL", 543 .offset = MTDPART_OFS_APPEND, 544 .size = SZ_16K + SZ_8K, 545 .mask_flags = MTD_WRITEABLE, 546 }, 547 [2] = { 548 .name = "U-Boot", 549 .offset = MTDPART_OFS_APPEND, 550 .size = SZ_256K - SZ_32K, 551 .mask_flags = MTD_WRITEABLE, 552 }, 553 [3] = { 554 .name = "U-Boot-Environment", 555 .offset = MTDPART_OFS_APPEND, 556 .size = SZ_16K, 557 .mask_flags = 0, 558 }, 559 [4] = { 560 .name = "Kernel", 561 .offset = MTDPART_OFS_APPEND, 562 .size = MTDPART_SIZ_FULL, 563 .mask_flags = 0, 564 }, 565}; 566 567static struct flash_platform_data da830evm_spiflash_data = { 568 .name = "m25p80", 569 .parts = da830evm_spiflash_part, 570 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part), 571 .type = "w25x32", 572}; 573 574static struct davinci_spi_config da830evm_spiflash_cfg = { 575 .io_type = SPI_IO_TYPE_DMA, 576 .c2tdelay = 8, 577 .t2cdelay = 8, 578}; 579 580static struct spi_board_info da830evm_spi_info[] = { 581 { 582 .modalias = "m25p80", 583 .platform_data = &da830evm_spiflash_data, 584 .controller_data = &da830evm_spiflash_cfg, 585 .mode = SPI_MODE_0, 586 .max_speed_hz = 30000000, 587 .bus_num = 0, 588 .chip_select = 0, 589 }, 590}; 591 592static __init void da830_evm_init(void) 593{ 594 struct davinci_soc_info *soc_info = &davinci_soc_info; 595 int ret; 596 597 da830_register_clocks(); 598 599 ret = da830_register_gpio(); 600 if (ret) 601 pr_warn("%s: GPIO init failed: %d\n", __func__, ret); 602 603 ret = da830_register_edma(da830_edma_rsv); 604 if (ret) 605 pr_warn("%s: edma registration failed: %d\n", __func__, ret); 606 607 ret = davinci_cfg_reg_list(da830_i2c0_pins); 608 if (ret) 609 pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret); 610 611 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata); 612 if (ret) 613 pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret); 614 615 da830_evm_usb_init(); 616 617 soc_info->emac_pdata->rmii_en = 1; 618 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; 619 620 ret = davinci_cfg_reg_list(da830_cpgmac_pins); 621 if (ret) 622 pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret); 623 624 ret = da8xx_register_emac(); 625 if (ret) 626 pr_warn("%s: emac registration failed: %d\n", __func__, ret); 627 628 ret = da8xx_register_watchdog(); 629 if (ret) 630 pr_warn("%s: watchdog registration failed: %d\n", 631 __func__, ret); 632 633 davinci_serial_init(da8xx_serial_device); 634 635 nvmem_add_cell_table(&da830_evm_nvmem_cell_table); 636 nvmem_add_cell_lookups(&da830_evm_nvmem_cell_lookup, 1); 637 638 i2c_register_board_info(1, da830_evm_i2c_devices, 639 ARRAY_SIZE(da830_evm_i2c_devices)); 640 641 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins); 642 if (ret) 643 pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret); 644 645 da8xx_register_mcasp(1, &da830_evm_snd_data); 646 647 da830_evm_init_mmc(); 648 649 ret = da8xx_register_rtc(); 650 if (ret) 651 pr_warn("%s: rtc setup failed: %d\n", __func__, ret); 652 653 ret = spi_register_board_info(da830evm_spi_info, 654 ARRAY_SIZE(da830evm_spi_info)); 655 if (ret) 656 pr_warn("%s: spi info registration failed: %d\n", 657 __func__, ret); 658 659 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info)); 660 if (ret) 661 pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret); 662 663 regulator_has_full_constraints(); 664} 665 666#ifdef CONFIG_SERIAL_8250_CONSOLE 667static int __init da830_evm_console_init(void) 668{ 669 if (!machine_is_davinci_da830_evm()) 670 return 0; 671 672 return add_preferred_console("ttyS", 2, "115200"); 673} 674console_initcall(da830_evm_console_init); 675#endif 676 677static void __init da830_evm_map_io(void) 678{ 679 da830_init(); 680} 681 682MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") 683 .atag_offset = 0x100, 684 .map_io = da830_evm_map_io, 685 .init_irq = da830_init_irq, 686 .init_time = da830_init_time, 687 .init_machine = da830_evm_init, 688 .init_late = davinci_init_late, 689 .dma_zone_size = SZ_128M, 690MACHINE_END 691