18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef ASMARM_SPARSEMEM_H 38c2ecf20Sopenharmony_ci#define ASMARM_SPARSEMEM_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci#include <asm/memory.h> 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci/* 88c2ecf20Sopenharmony_ci * Two definitions are required for sparsemem: 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * MAX_PHYSMEM_BITS: The number of physical address bits required 118c2ecf20Sopenharmony_ci * to address the last byte of memory. 128c2ecf20Sopenharmony_ci * 138c2ecf20Sopenharmony_ci * SECTION_SIZE_BITS: The number of physical address bits to cover 148c2ecf20Sopenharmony_ci * the maximum amount of memory in a section. 158c2ecf20Sopenharmony_ci * 168c2ecf20Sopenharmony_ci * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000, 178c2ecf20Sopenharmony_ci * then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26. 188c2ecf20Sopenharmony_ci * 198c2ecf20Sopenharmony_ci * These can be overridden in your mach/memory.h. 208c2ecf20Sopenharmony_ci */ 218c2ecf20Sopenharmony_ci#if !defined(MAX_PHYSMEM_BITS) || !defined(SECTION_SIZE_BITS) 228c2ecf20Sopenharmony_ci#define MAX_PHYSMEM_BITS 36 238c2ecf20Sopenharmony_ci#define SECTION_SIZE_BITS 28 248c2ecf20Sopenharmony_ci#endif 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci#endif 27