1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * arch/arm/include/asm/smp.h 4 * 5 * Copyright (C) 2004-2005 ARM Ltd. 6 */ 7#ifndef __ASM_ARM_SMP_H 8#define __ASM_ARM_SMP_H 9 10#include <linux/threads.h> 11#include <linux/cpumask.h> 12#include <linux/thread_info.h> 13 14#ifndef CONFIG_SMP 15# error "<asm/smp.h> included in non-SMP build" 16#endif 17 18#define raw_smp_processor_id() (current_thread_info()->cpu) 19 20struct seq_file; 21 22/* 23 * generate IPI list text 24 */ 25extern void show_ipi_list(struct seq_file *, int); 26 27/* 28 * Called from assembly code, this handles an IPI. 29 */ 30asmlinkage void do_IPI(int ipinr, struct pt_regs *regs); 31 32/* 33 * Called from C code, this handles an IPI. 34 */ 35void handle_IPI(int ipinr, struct pt_regs *regs); 36 37/* 38 * Setup the set of possible CPUs (via set_cpu_possible) 39 */ 40extern void smp_init_cpus(void); 41 42/* 43 * Register IPI interrupts with the arch SMP code 44 */ 45extern void set_smp_ipi_range(int ipi_base, int nr_ipi); 46 47/* 48 * Called from platform specific assembly code, this is the 49 * secondary CPU entry point. 50 */ 51asmlinkage void secondary_start_kernel(void); 52 53 54/* 55 * Initial data for bringing up a secondary CPU. 56 */ 57struct secondary_data { 58 union { 59 struct mpu_rgn_info *mpu_rgn_info; 60 u64 pgdir; 61 }; 62 unsigned long swapper_pg_dir; 63 void *stack; 64}; 65extern struct secondary_data secondary_data; 66extern void secondary_startup(void); 67extern void secondary_startup_arm(void); 68 69extern int __cpu_disable(void); 70 71extern void __cpu_die(unsigned int cpu); 72 73extern void arch_send_call_function_single_ipi(int cpu); 74extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 75extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask); 76 77extern int register_ipi_completion(struct completion *completion, int cpu); 78 79struct smp_operations { 80#ifdef CONFIG_SMP 81 /* 82 * Setup the set of possible CPUs (via set_cpu_possible) 83 */ 84 void (*smp_init_cpus)(void); 85 /* 86 * Initialize cpu_possible map, and enable coherency 87 */ 88 void (*smp_prepare_cpus)(unsigned int max_cpus); 89 90 /* 91 * Perform platform specific initialisation of the specified CPU. 92 */ 93 void (*smp_secondary_init)(unsigned int cpu); 94 /* 95 * Boot a secondary CPU, and assign it the specified idle task. 96 * This also gives us the initial stack to use for this CPU. 97 */ 98 int (*smp_boot_secondary)(unsigned int cpu, struct task_struct *idle); 99#ifdef CONFIG_HOTPLUG_CPU 100 int (*cpu_kill)(unsigned int cpu); 101 void (*cpu_die)(unsigned int cpu); 102 bool (*cpu_can_disable)(unsigned int cpu); 103 int (*cpu_disable)(unsigned int cpu); 104#endif 105#endif 106}; 107 108struct of_cpu_method { 109 const char *method; 110 const struct smp_operations *ops; 111}; 112 113#define CPU_METHOD_OF_DECLARE(name, _method, _ops) \ 114 static const struct of_cpu_method __cpu_method_of_table_##name \ 115 __used __section("__cpu_method_of_table") \ 116 = { .method = _method, .ops = _ops } 117/* 118 * set platform specific SMP operations 119 */ 120extern void smp_set_ops(const struct smp_operations *); 121 122#endif /* ifndef __ASM_ARM_SMP_H */ 123