18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci#ifndef __ASM_ARM_DMA_H
38c2ecf20Sopenharmony_ci#define __ASM_ARM_DMA_H
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci/*
68c2ecf20Sopenharmony_ci * This is the maximum virtual address which can be DMA'd from.
78c2ecf20Sopenharmony_ci */
88c2ecf20Sopenharmony_ci#ifndef CONFIG_ZONE_DMA
98c2ecf20Sopenharmony_ci#define MAX_DMA_ADDRESS	0xffffffffUL
108c2ecf20Sopenharmony_ci#else
118c2ecf20Sopenharmony_ci#define MAX_DMA_ADDRESS	({ \
128c2ecf20Sopenharmony_ci	extern phys_addr_t arm_dma_zone_size; \
138c2ecf20Sopenharmony_ci	arm_dma_zone_size && arm_dma_zone_size < (0x100000000ULL - PAGE_OFFSET) ? \
148c2ecf20Sopenharmony_ci		(PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; })
158c2ecf20Sopenharmony_ci#endif
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#ifdef CONFIG_ISA_DMA_API
188c2ecf20Sopenharmony_ci/*
198c2ecf20Sopenharmony_ci * This is used to support drivers written for the x86 ISA DMA API.
208c2ecf20Sopenharmony_ci * It should not be re-used except for that purpose.
218c2ecf20Sopenharmony_ci */
228c2ecf20Sopenharmony_ci#include <linux/spinlock.h>
238c2ecf20Sopenharmony_ci#include <linux/scatterlist.h>
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci#include <mach/isa-dma.h>
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/*
288c2ecf20Sopenharmony_ci * The DMA modes reflect the settings for the ISA DMA controller
298c2ecf20Sopenharmony_ci */
308c2ecf20Sopenharmony_ci#define DMA_MODE_MASK	 0xcc
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci#define DMA_MODE_READ	 0x44
338c2ecf20Sopenharmony_ci#define DMA_MODE_WRITE	 0x48
348c2ecf20Sopenharmony_ci#define DMA_MODE_CASCADE 0xc0
358c2ecf20Sopenharmony_ci#define DMA_AUTOINIT	 0x10
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ciextern raw_spinlock_t  dma_spin_lock;
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic inline unsigned long claim_dma_lock(void)
408c2ecf20Sopenharmony_ci{
418c2ecf20Sopenharmony_ci	unsigned long flags;
428c2ecf20Sopenharmony_ci	raw_spin_lock_irqsave(&dma_spin_lock, flags);
438c2ecf20Sopenharmony_ci	return flags;
448c2ecf20Sopenharmony_ci}
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_cistatic inline void release_dma_lock(unsigned long flags)
478c2ecf20Sopenharmony_ci{
488c2ecf20Sopenharmony_ci	raw_spin_unlock_irqrestore(&dma_spin_lock, flags);
498c2ecf20Sopenharmony_ci}
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci/* Clear the 'DMA Pointer Flip Flop'.
528c2ecf20Sopenharmony_ci * Write 0 for LSB/MSB, 1 for MSB/LSB access.
538c2ecf20Sopenharmony_ci */
548c2ecf20Sopenharmony_ci#define clear_dma_ff(chan)
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci/* Set only the page register bits of the transfer address.
578c2ecf20Sopenharmony_ci *
588c2ecf20Sopenharmony_ci * NOTE: This is an architecture specific function, and should
598c2ecf20Sopenharmony_ci *       be hidden from the drivers
608c2ecf20Sopenharmony_ci */
618c2ecf20Sopenharmony_ciextern void set_dma_page(unsigned int chan, char pagenr);
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_ci/* Request a DMA channel
648c2ecf20Sopenharmony_ci *
658c2ecf20Sopenharmony_ci * Some architectures may need to do allocate an interrupt
668c2ecf20Sopenharmony_ci */
678c2ecf20Sopenharmony_ciextern int  request_dma(unsigned int chan, const char * device_id);
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci/* Free a DMA channel
708c2ecf20Sopenharmony_ci *
718c2ecf20Sopenharmony_ci * Some architectures may need to do free an interrupt
728c2ecf20Sopenharmony_ci */
738c2ecf20Sopenharmony_ciextern void free_dma(unsigned int chan);
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci/* Enable DMA for this channel
768c2ecf20Sopenharmony_ci *
778c2ecf20Sopenharmony_ci * On some architectures, this may have other side effects like
788c2ecf20Sopenharmony_ci * enabling an interrupt and setting the DMA registers.
798c2ecf20Sopenharmony_ci */
808c2ecf20Sopenharmony_ciextern void enable_dma(unsigned int chan);
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci/* Disable DMA for this channel
838c2ecf20Sopenharmony_ci *
848c2ecf20Sopenharmony_ci * On some architectures, this may have other side effects like
858c2ecf20Sopenharmony_ci * disabling an interrupt or whatever.
868c2ecf20Sopenharmony_ci */
878c2ecf20Sopenharmony_ciextern void disable_dma(unsigned int chan);
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci/* Test whether the specified channel has an active DMA transfer
908c2ecf20Sopenharmony_ci */
918c2ecf20Sopenharmony_ciextern int dma_channel_active(unsigned int chan);
928c2ecf20Sopenharmony_ci
938c2ecf20Sopenharmony_ci/* Set the DMA scatter gather list for this channel
948c2ecf20Sopenharmony_ci *
958c2ecf20Sopenharmony_ci * This should not be called if a DMA channel is enabled,
968c2ecf20Sopenharmony_ci * especially since some DMA architectures don't update the
978c2ecf20Sopenharmony_ci * DMA address immediately, but defer it to the enable_dma().
988c2ecf20Sopenharmony_ci */
998c2ecf20Sopenharmony_ciextern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg);
1008c2ecf20Sopenharmony_ci
1018c2ecf20Sopenharmony_ci/* Set the DMA address for this channel
1028c2ecf20Sopenharmony_ci *
1038c2ecf20Sopenharmony_ci * This should not be called if a DMA channel is enabled,
1048c2ecf20Sopenharmony_ci * especially since some DMA architectures don't update the
1058c2ecf20Sopenharmony_ci * DMA address immediately, but defer it to the enable_dma().
1068c2ecf20Sopenharmony_ci */
1078c2ecf20Sopenharmony_ciextern void __set_dma_addr(unsigned int chan, void *addr);
1088c2ecf20Sopenharmony_ci#define set_dma_addr(chan, addr)				\
1098c2ecf20Sopenharmony_ci	__set_dma_addr(chan, (void *)__bus_to_virt(addr))
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci/* Set the DMA byte count for this channel
1128c2ecf20Sopenharmony_ci *
1138c2ecf20Sopenharmony_ci * This should not be called if a DMA channel is enabled,
1148c2ecf20Sopenharmony_ci * especially since some DMA architectures don't update the
1158c2ecf20Sopenharmony_ci * DMA count immediately, but defer it to the enable_dma().
1168c2ecf20Sopenharmony_ci */
1178c2ecf20Sopenharmony_ciextern void set_dma_count(unsigned int chan, unsigned long count);
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci/* Set the transfer direction for this channel
1208c2ecf20Sopenharmony_ci *
1218c2ecf20Sopenharmony_ci * This should not be called if a DMA channel is enabled,
1228c2ecf20Sopenharmony_ci * especially since some DMA architectures don't update the
1238c2ecf20Sopenharmony_ci * DMA transfer direction immediately, but defer it to the
1248c2ecf20Sopenharmony_ci * enable_dma().
1258c2ecf20Sopenharmony_ci */
1268c2ecf20Sopenharmony_ciextern void set_dma_mode(unsigned int chan, unsigned int mode);
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci/* Set the transfer speed for this channel
1298c2ecf20Sopenharmony_ci */
1308c2ecf20Sopenharmony_ciextern void set_dma_speed(unsigned int chan, int cycle_ns);
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ci/* Get DMA residue count. After a DMA transfer, this
1338c2ecf20Sopenharmony_ci * should return zero. Reading this while a DMA transfer is
1348c2ecf20Sopenharmony_ci * still in progress will return unpredictable results.
1358c2ecf20Sopenharmony_ci * If called before the channel has been used, it may return 1.
1368c2ecf20Sopenharmony_ci * Otherwise, it returns the number of _bytes_ left to transfer.
1378c2ecf20Sopenharmony_ci */
1388c2ecf20Sopenharmony_ciextern int  get_dma_residue(unsigned int chan);
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci#ifndef NO_DMA
1418c2ecf20Sopenharmony_ci#define NO_DMA	255
1428c2ecf20Sopenharmony_ci#endif
1438c2ecf20Sopenharmony_ci
1448c2ecf20Sopenharmony_ci#endif /* CONFIG_ISA_DMA_API */
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_ci#ifdef CONFIG_PCI
1478c2ecf20Sopenharmony_ciextern int isa_dma_bridge_buggy;
1488c2ecf20Sopenharmony_ci#else
1498c2ecf20Sopenharmony_ci#define isa_dma_bridge_buggy    (0)
1508c2ecf20Sopenharmony_ci#endif
1518c2ecf20Sopenharmony_ci
1528c2ecf20Sopenharmony_ci#endif /* __ASM_ARM_DMA_H */
153