18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci// 38c2ecf20Sopenharmony_ci// Copyright 2019 NXP 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci/dts-v1/; 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#include "imx7ulp.dtsi" 88c2ecf20Sopenharmony_ci#include <dt-bindings/input/input.h> 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci/ { 118c2ecf20Sopenharmony_ci model = "Embedded Artists i.MX7ULP COM"; 128c2ecf20Sopenharmony_ci compatible = "ea,imx7ulp-com", "fsl,imx7ulp"; 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci chosen { 158c2ecf20Sopenharmony_ci stdout-path = &lpuart4; 168c2ecf20Sopenharmony_ci }; 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci memory@60000000 { 198c2ecf20Sopenharmony_ci device_type = "memory"; 208c2ecf20Sopenharmony_ci reg = <0x60000000 0x4000000>; 218c2ecf20Sopenharmony_ci }; 228c2ecf20Sopenharmony_ci}; 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci&lpuart4 { 258c2ecf20Sopenharmony_ci pinctrl-names = "default"; 268c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_lpuart4>; 278c2ecf20Sopenharmony_ci status = "okay"; 288c2ecf20Sopenharmony_ci}; 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci&usbotg1 { 318c2ecf20Sopenharmony_ci pinctrl-names = "default"; 328c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_usbotg1_id>; 338c2ecf20Sopenharmony_ci srp-disable; 348c2ecf20Sopenharmony_ci hnp-disable; 358c2ecf20Sopenharmony_ci adp-disable; 368c2ecf20Sopenharmony_ci status = "okay"; 378c2ecf20Sopenharmony_ci}; 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci&usdhc0 { 408c2ecf20Sopenharmony_ci assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>; 418c2ecf20Sopenharmony_ci assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>; 428c2ecf20Sopenharmony_ci pinctrl-names = "default"; 438c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_usdhc0>; 448c2ecf20Sopenharmony_ci non-removable; 458c2ecf20Sopenharmony_ci bus-width = <8>; 468c2ecf20Sopenharmony_ci no-1-8-v; 478c2ecf20Sopenharmony_ci status = "okay"; 488c2ecf20Sopenharmony_ci}; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci&iomuxc1 { 518c2ecf20Sopenharmony_ci pinctrl_lpuart4: lpuart4grp { 528c2ecf20Sopenharmony_ci fsl,pins = < 538c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTC3__LPUART4_RX 0x3 548c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTC2__LPUART4_TX 0x3 558c2ecf20Sopenharmony_ci >; 568c2ecf20Sopenharmony_ci }; 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci pinctrl_usbotg1_id: otg1idgrp { 598c2ecf20Sopenharmony_ci fsl,pins = < 608c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTC13__USB0_ID 0x10003 618c2ecf20Sopenharmony_ci >; 628c2ecf20Sopenharmony_ci }; 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci pinctrl_usdhc0: usdhc0grp { 658c2ecf20Sopenharmony_ci fsl,pins = < 668c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 678c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042 688c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD3__SDHC0_D7 0x43 698c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD4__SDHC0_D6 0x43 708c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD5__SDHC0_D5 0x43 718c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD6__SDHC0_D4 0x43 728c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 738c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 748c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 758c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 768c2ecf20Sopenharmony_ci IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42 778c2ecf20Sopenharmony_ci >; 788c2ecf20Sopenharmony_ci }; 798c2ecf20Sopenharmony_ci}; 80