18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci# 38c2ecf20Sopenharmony_ci# Kconfig for uClinux(non-paged MM) depend configurations 48c2ecf20Sopenharmony_ci# Hyok S. Choi <hyok.choi@samsung.com> 58c2ecf20Sopenharmony_ci# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciconfig SET_MEM_PARAM 88c2ecf20Sopenharmony_ci bool "Set flash/sdram size and base addr" 98c2ecf20Sopenharmony_ci help 108c2ecf20Sopenharmony_ci Say Y to manually set the base addresses and sizes. 118c2ecf20Sopenharmony_ci otherwise, the default values are assigned. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciconfig DRAM_BASE 148c2ecf20Sopenharmony_ci hex '(S)DRAM Base Address' if SET_MEM_PARAM 158c2ecf20Sopenharmony_ci default 0x00800000 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciconfig DRAM_SIZE 188c2ecf20Sopenharmony_ci hex '(S)DRAM SIZE' if SET_MEM_PARAM 198c2ecf20Sopenharmony_ci default 0x00800000 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciconfig FLASH_MEM_BASE 228c2ecf20Sopenharmony_ci hex 'FLASH Base Address' if SET_MEM_PARAM 238c2ecf20Sopenharmony_ci depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T 248c2ecf20Sopenharmony_ci default 0x00400000 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciconfig FLASH_SIZE 278c2ecf20Sopenharmony_ci hex 'FLASH Size' if SET_MEM_PARAM 288c2ecf20Sopenharmony_ci depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T 298c2ecf20Sopenharmony_ci default 0x00400000 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciconfig PROCESSOR_ID 328c2ecf20Sopenharmony_ci hex 'Hard wire the processor ID' 338c2ecf20Sopenharmony_ci default 0x00007700 348c2ecf20Sopenharmony_ci depends on !(CPU_CP15 || CPU_V7M) 358c2ecf20Sopenharmony_ci help 368c2ecf20Sopenharmony_ci If processor has no CP15 register, this processor ID is 378c2ecf20Sopenharmony_ci used instead of the auto-probing which utilizes the register. 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ciconfig REMAP_VECTORS_TO_RAM 408c2ecf20Sopenharmony_ci bool 'Install vectors to the beginning of RAM' 418c2ecf20Sopenharmony_ci help 428c2ecf20Sopenharmony_ci The kernel needs to change the hardware exception vectors. 438c2ecf20Sopenharmony_ci In nommu mode, the hardware exception vectors are normally 448c2ecf20Sopenharmony_ci placed at address 0x00000000. However, this region may be 458c2ecf20Sopenharmony_ci occupied by read-only memory depending on H/W design. 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci If the region contains read-write memory, say 'n' here. 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci If your CPU provides a remap facility which allows the exception 508c2ecf20Sopenharmony_ci vectors to be mapped to writable memory, say 'n' here. 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci Otherwise, say 'y' here. In this case, the kernel will require 538c2ecf20Sopenharmony_ci external support to redirect the hardware exception vectors to 548c2ecf20Sopenharmony_ci the writable versions located at DRAM_BASE. 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ciconfig ARM_MPU 578c2ecf20Sopenharmony_ci bool 'Use the ARM v7 PMSA Compliant MPU' 588c2ecf20Sopenharmony_ci depends on CPU_V7 || CPU_V7M 598c2ecf20Sopenharmony_ci default y if CPU_V7 608c2ecf20Sopenharmony_ci help 618c2ecf20Sopenharmony_ci Some ARM systems without an MMU have instead a Memory Protection 628c2ecf20Sopenharmony_ci Unit (MPU) that defines the type and permissions for regions of 638c2ecf20Sopenharmony_ci memory. 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci If your CPU has an MPU then you should choose 'y' here unless you 668c2ecf20Sopenharmony_ci know that you do not want to use the MPU. 67