18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)
48c2ecf20Sopenharmony_ci */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci/*
78c2ecf20Sopenharmony_ci * Device tree for AXC003 CPU card:
88c2ecf20Sopenharmony_ci * HS38x2 (Dual Core) with IDU intc (VDK version)
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci/include/ "skeleton_hs_idu.dtsi"
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci/ {
148c2ecf20Sopenharmony_ci	compatible = "snps,arc";
158c2ecf20Sopenharmony_ci	#address-cells = <1>;
168c2ecf20Sopenharmony_ci	#size-cells = <1>;
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci	cpu_card {
198c2ecf20Sopenharmony_ci		compatible = "simple-bus";
208c2ecf20Sopenharmony_ci		#address-cells = <1>;
218c2ecf20Sopenharmony_ci		#size-cells = <1>;
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci		ranges = <0x00000000 0xf0000000 0x10000000>;
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci		core_clk: core_clk {
268c2ecf20Sopenharmony_ci			#clock-cells = <0>;
278c2ecf20Sopenharmony_ci			compatible = "fixed-clock";
288c2ecf20Sopenharmony_ci			clock-frequency = <50000000>;
298c2ecf20Sopenharmony_ci		};
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci		core_intc: archs-intc@cpu {
328c2ecf20Sopenharmony_ci			compatible = "snps,archs-intc";
338c2ecf20Sopenharmony_ci			interrupt-controller;
348c2ecf20Sopenharmony_ci			#interrupt-cells = <1>;
358c2ecf20Sopenharmony_ci		};
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci		idu_intc: idu-interrupt-controller {
388c2ecf20Sopenharmony_ci			compatible = "snps,archs-idu-intc";
398c2ecf20Sopenharmony_ci			interrupt-controller;
408c2ecf20Sopenharmony_ci			interrupt-parent = <&core_intc>;
418c2ecf20Sopenharmony_ci			#interrupt-cells = <1>;
428c2ecf20Sopenharmony_ci		};
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci		debug_uart: dw-apb-uart@5000 {
458c2ecf20Sopenharmony_ci			compatible = "snps,dw-apb-uart";
468c2ecf20Sopenharmony_ci			reg = <0x5000 0x100>;
478c2ecf20Sopenharmony_ci			clock-frequency = <2403200>;
488c2ecf20Sopenharmony_ci			interrupt-parent = <&idu_intc>;
498c2ecf20Sopenharmony_ci			interrupts = <2>;
508c2ecf20Sopenharmony_ci			baud = <115200>;
518c2ecf20Sopenharmony_ci			reg-shift = <2>;
528c2ecf20Sopenharmony_ci			reg-io-width = <4>;
538c2ecf20Sopenharmony_ci		};
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	};
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci	mb_intc: interrupt-controller@e0012000 {
588c2ecf20Sopenharmony_ci		#interrupt-cells = <1>;
598c2ecf20Sopenharmony_ci		compatible = "snps,dw-apb-ictl";
608c2ecf20Sopenharmony_ci		reg = < 0xe0012000 0x200 >;
618c2ecf20Sopenharmony_ci		interrupt-controller;
628c2ecf20Sopenharmony_ci		interrupt-parent = <&idu_intc>;
638c2ecf20Sopenharmony_ci		interrupts = <0>;
648c2ecf20Sopenharmony_ci	};
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci	memory {
678c2ecf20Sopenharmony_ci		#address-cells = <1>;
688c2ecf20Sopenharmony_ci		#size-cells = <1>;
698c2ecf20Sopenharmony_ci		ranges = <0x00000000 0x80000000 0x40000000>;
708c2ecf20Sopenharmony_ci		device_type = "memory";
718c2ecf20Sopenharmony_ci		reg = <0x80000000 0x20000000>;	/* 512MiB */
728c2ecf20Sopenharmony_ci	};
738c2ecf20Sopenharmony_ci};
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