18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef __ALPHA_MCE_H 38c2ecf20Sopenharmony_ci#define __ALPHA_MCE_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci/* 68c2ecf20Sopenharmony_ci * This is the logout header that should be common to all platforms 78c2ecf20Sopenharmony_ci * (assuming they are running OSF/1 PALcode, I guess). 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_cistruct el_common { 108c2ecf20Sopenharmony_ci unsigned int size; /* size in bytes of logout area */ 118c2ecf20Sopenharmony_ci unsigned int sbz1 : 30; /* should be zero */ 128c2ecf20Sopenharmony_ci unsigned int err2 : 1; /* second error */ 138c2ecf20Sopenharmony_ci unsigned int retry : 1; /* retry flag */ 148c2ecf20Sopenharmony_ci unsigned int proc_offset; /* processor-specific offset */ 158c2ecf20Sopenharmony_ci unsigned int sys_offset; /* system-specific offset */ 168c2ecf20Sopenharmony_ci unsigned int code; /* machine check code */ 178c2ecf20Sopenharmony_ci unsigned int frame_rev; /* frame revision */ 188c2ecf20Sopenharmony_ci}; 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci/* Machine Check Frame for uncorrectable errors (Large format) 218c2ecf20Sopenharmony_ci * --- This is used to log uncorrectable errors such as 228c2ecf20Sopenharmony_ci * double bit ECC errors. 238c2ecf20Sopenharmony_ci * --- These errors are detected by both processor and systems. 248c2ecf20Sopenharmony_ci */ 258c2ecf20Sopenharmony_cistruct el_common_EV5_uncorrectable_mcheck { 268c2ecf20Sopenharmony_ci unsigned long shadow[8]; /* Shadow reg. 8-14, 25 */ 278c2ecf20Sopenharmony_ci unsigned long paltemp[24]; /* PAL TEMP REGS. */ 288c2ecf20Sopenharmony_ci unsigned long exc_addr; /* Address of excepting instruction*/ 298c2ecf20Sopenharmony_ci unsigned long exc_sum; /* Summary of arithmetic traps. */ 308c2ecf20Sopenharmony_ci unsigned long exc_mask; /* Exception mask (from exc_sum). */ 318c2ecf20Sopenharmony_ci unsigned long pal_base; /* Base address for PALcode. */ 328c2ecf20Sopenharmony_ci unsigned long isr; /* Interrupt Status Reg. */ 338c2ecf20Sopenharmony_ci unsigned long icsr; /* CURRENT SETUP OF EV5 IBOX */ 348c2ecf20Sopenharmony_ci unsigned long ic_perr_stat; /* I-CACHE Reg. <11> set Data parity 358c2ecf20Sopenharmony_ci <12> set TAG parity*/ 368c2ecf20Sopenharmony_ci unsigned long dc_perr_stat; /* D-CACHE error Reg. Bits set to 1: 378c2ecf20Sopenharmony_ci <2> Data error in bank 0 388c2ecf20Sopenharmony_ci <3> Data error in bank 1 398c2ecf20Sopenharmony_ci <4> Tag error in bank 0 408c2ecf20Sopenharmony_ci <5> Tag error in bank 1 */ 418c2ecf20Sopenharmony_ci unsigned long va; /* Effective VA of fault or miss. */ 428c2ecf20Sopenharmony_ci unsigned long mm_stat; /* Holds the reason for D-stream 438c2ecf20Sopenharmony_ci fault or D-cache parity errors */ 448c2ecf20Sopenharmony_ci unsigned long sc_addr; /* Address that was being accessed 458c2ecf20Sopenharmony_ci when EV5 detected Secondary cache 468c2ecf20Sopenharmony_ci failure. */ 478c2ecf20Sopenharmony_ci unsigned long sc_stat; /* Helps determine if the error was 488c2ecf20Sopenharmony_ci TAG/Data parity(Secondary Cache)*/ 498c2ecf20Sopenharmony_ci unsigned long bc_tag_addr; /* Contents of EV5 BC_TAG_ADDR */ 508c2ecf20Sopenharmony_ci unsigned long ei_addr; /* Physical address of any transfer 518c2ecf20Sopenharmony_ci that is logged in EV5 EI_STAT */ 528c2ecf20Sopenharmony_ci unsigned long fill_syndrome; /* For correcting ECC errors. */ 538c2ecf20Sopenharmony_ci unsigned long ei_stat; /* Helps identify reason of any 548c2ecf20Sopenharmony_ci processor uncorrectable error 558c2ecf20Sopenharmony_ci at its external interface. */ 568c2ecf20Sopenharmony_ci unsigned long ld_lock; /* Contents of EV5 LD_LOCK register*/ 578c2ecf20Sopenharmony_ci}; 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_cistruct el_common_EV6_mcheck { 608c2ecf20Sopenharmony_ci unsigned int FrameSize; /* Bytes, including this field */ 618c2ecf20Sopenharmony_ci unsigned int FrameFlags; /* <31> = Retry, <30> = Second Error */ 628c2ecf20Sopenharmony_ci unsigned int CpuOffset; /* Offset to CPU-specific info */ 638c2ecf20Sopenharmony_ci unsigned int SystemOffset; /* Offset to system-specific info */ 648c2ecf20Sopenharmony_ci unsigned int MCHK_Code; 658c2ecf20Sopenharmony_ci unsigned int MCHK_Frame_Rev; 668c2ecf20Sopenharmony_ci unsigned long I_STAT; /* EV6 Internal Processor Registers */ 678c2ecf20Sopenharmony_ci unsigned long DC_STAT; /* (See the 21264 Spec) */ 688c2ecf20Sopenharmony_ci unsigned long C_ADDR; 698c2ecf20Sopenharmony_ci unsigned long DC1_SYNDROME; 708c2ecf20Sopenharmony_ci unsigned long DC0_SYNDROME; 718c2ecf20Sopenharmony_ci unsigned long C_STAT; 728c2ecf20Sopenharmony_ci unsigned long C_STS; 738c2ecf20Sopenharmony_ci unsigned long MM_STAT; 748c2ecf20Sopenharmony_ci unsigned long EXC_ADDR; 758c2ecf20Sopenharmony_ci unsigned long IER_CM; 768c2ecf20Sopenharmony_ci unsigned long ISUM; 778c2ecf20Sopenharmony_ci unsigned long RESERVED0; 788c2ecf20Sopenharmony_ci unsigned long PAL_BASE; 798c2ecf20Sopenharmony_ci unsigned long I_CTL; 808c2ecf20Sopenharmony_ci unsigned long PCTX; 818c2ecf20Sopenharmony_ci}; 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ci#endif /* __ALPHA_MCE_H */ 85