18c2ecf20Sopenharmony_ci.. SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ci=====================
48c2ecf20Sopenharmony_ciAMD Memory Encryption
58c2ecf20Sopenharmony_ci=====================
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ciSecure Memory Encryption (SME) and Secure Encrypted Virtualization (SEV) are
88c2ecf20Sopenharmony_cifeatures found on AMD processors.
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ciSME provides the ability to mark individual pages of memory as encrypted using
118c2ecf20Sopenharmony_cithe standard x86 page tables.  A page that is marked encrypted will be
128c2ecf20Sopenharmony_ciautomatically decrypted when read from DRAM and encrypted when written to
138c2ecf20Sopenharmony_ciDRAM.  SME can therefore be used to protect the contents of DRAM from physical
148c2ecf20Sopenharmony_ciattacks on the system.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciSEV enables running encrypted virtual machines (VMs) in which the code and data
178c2ecf20Sopenharmony_ciof the guest VM are secured so that a decrypted version is available only
188c2ecf20Sopenharmony_ciwithin the VM itself. SEV guest VMs have the concept of private and shared
198c2ecf20Sopenharmony_cimemory. Private memory is encrypted with the guest-specific key, while shared
208c2ecf20Sopenharmony_cimemory may be encrypted with hypervisor key. When SME is enabled, the hypervisor
218c2ecf20Sopenharmony_cikey is the same key which is used in SME.
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciA page is encrypted when a page table entry has the encryption bit set (see
248c2ecf20Sopenharmony_cibelow on how to determine its position).  The encryption bit can also be
258c2ecf20Sopenharmony_cispecified in the cr3 register, allowing the PGD table to be encrypted. Each
268c2ecf20Sopenharmony_cisuccessive level of page tables can also be encrypted by setting the encryption
278c2ecf20Sopenharmony_cibit in the page table entry that points to the next table. This allows the full
288c2ecf20Sopenharmony_cipage table hierarchy to be encrypted. Note, this means that just because the
298c2ecf20Sopenharmony_ciencryption bit is set in cr3, doesn't imply the full hierarchy is encrypted.
308c2ecf20Sopenharmony_ciEach page table entry in the hierarchy needs to have the encryption bit set to
318c2ecf20Sopenharmony_ciachieve that. So, theoretically, you could have the encryption bit set in cr3
328c2ecf20Sopenharmony_ciso that the PGD is encrypted, but not set the encryption bit in the PGD entry
338c2ecf20Sopenharmony_cifor a PUD which results in the PUD pointed to by that entry to not be
348c2ecf20Sopenharmony_ciencrypted.
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ciWhen SEV is enabled, instruction pages and guest page tables are always treated
378c2ecf20Sopenharmony_cias private. All the DMA operations inside the guest must be performed on shared
388c2ecf20Sopenharmony_cimemory. Since the memory encryption bit is controlled by the guest OS when it
398c2ecf20Sopenharmony_ciis operating in 64-bit or 32-bit PAE mode, in all other modes the SEV hardware
408c2ecf20Sopenharmony_ciforces the memory encryption bit to 1.
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ciSupport for SME and SEV can be determined through the CPUID instruction. The
438c2ecf20Sopenharmony_ciCPUID function 0x8000001f reports information related to SME::
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci	0x8000001f[eax]:
468c2ecf20Sopenharmony_ci		Bit[0] indicates support for SME
478c2ecf20Sopenharmony_ci		Bit[1] indicates support for SEV
488c2ecf20Sopenharmony_ci	0x8000001f[ebx]:
498c2ecf20Sopenharmony_ci		Bits[5:0]  pagetable bit number used to activate memory
508c2ecf20Sopenharmony_ci			   encryption
518c2ecf20Sopenharmony_ci		Bits[11:6] reduction in physical address space, in bits, when
528c2ecf20Sopenharmony_ci			   memory encryption is enabled (this only affects
538c2ecf20Sopenharmony_ci			   system physical addresses, not guest physical
548c2ecf20Sopenharmony_ci			   addresses)
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ciIf support for SME is present, MSR 0xc00100010 (MSR_K8_SYSCFG) can be used to
578c2ecf20Sopenharmony_cidetermine if SME is enabled and/or to enable memory encryption::
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci	0xc0010010:
608c2ecf20Sopenharmony_ci		Bit[23]   0 = memory encryption features are disabled
618c2ecf20Sopenharmony_ci			  1 = memory encryption features are enabled
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_ciIf SEV is supported, MSR 0xc0010131 (MSR_AMD64_SEV) can be used to determine if
648c2ecf20Sopenharmony_ciSEV is active::
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci	0xc0010131:
678c2ecf20Sopenharmony_ci		Bit[0]	  0 = memory encryption is not active
688c2ecf20Sopenharmony_ci			  1 = memory encryption is active
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ciLinux relies on BIOS to set this bit if BIOS has determined that the reduction
718c2ecf20Sopenharmony_ciin the physical address space as a result of enabling memory encryption (see
728c2ecf20Sopenharmony_ciCPUID information above) will not conflict with the address space resource
738c2ecf20Sopenharmony_cirequirements for the system.  If this bit is not set upon Linux startup then
748c2ecf20Sopenharmony_ciLinux itself will not set it and memory encryption will not be possible.
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ciThe state of SME in the Linux kernel can be documented as follows:
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci	- Supported:
798c2ecf20Sopenharmony_ci	  The CPU supports SME (determined through CPUID instruction).
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci	- Enabled:
828c2ecf20Sopenharmony_ci	  Supported and bit 23 of MSR_K8_SYSCFG is set.
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci	- Active:
858c2ecf20Sopenharmony_ci	  Supported, Enabled and the Linux kernel is actively applying
868c2ecf20Sopenharmony_ci	  the encryption bit to page table entries (the SME mask in the
878c2ecf20Sopenharmony_ci	  kernel is non-zero).
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ciSME can also be enabled and activated in the BIOS. If SME is enabled and
908c2ecf20Sopenharmony_ciactivated in the BIOS, then all memory accesses will be encrypted and it will
918c2ecf20Sopenharmony_cinot be necessary to activate the Linux memory encryption support.  If the BIOS
928c2ecf20Sopenharmony_cimerely enables SME (sets bit 23 of the MSR_K8_SYSCFG), then Linux can activate
938c2ecf20Sopenharmony_cimemory encryption by default (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=y) or
948c2ecf20Sopenharmony_ciby supplying mem_encrypt=on on the kernel command line.  However, if BIOS does
958c2ecf20Sopenharmony_cinot enable SME, then Linux will not be able to activate memory encryption, even
968c2ecf20Sopenharmony_ciif configured to do so by default or the mem_encrypt=on command line parameter
978c2ecf20Sopenharmony_ciis specified.
98