18c2ecf20Sopenharmony_ci===================================== 28c2ecf20Sopenharmony_ciLinux I2C slave interface description 38c2ecf20Sopenharmony_ci===================================== 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciby Wolfram Sang <wsa@sang-engineering.com> in 2014-15 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciLinux can also be an I2C slave if the I2C controller in use has slave 88c2ecf20Sopenharmony_cifunctionality. For that to work, one needs slave support in the bus driver plus 98c2ecf20Sopenharmony_cia hardware independent software backend providing the actual functionality. An 108c2ecf20Sopenharmony_ciexample for the latter is the slave-eeprom driver, which acts as a dual memory 118c2ecf20Sopenharmony_cidriver. While another I2C master on the bus can access it like a regular 128c2ecf20Sopenharmony_ciEEPROM, the Linux I2C slave can access the content via sysfs and handle data as 138c2ecf20Sopenharmony_cineeded. The backend driver and the I2C bus driver communicate via events. Here 148c2ecf20Sopenharmony_ciis a small graph visualizing the data flow and the means by which data is 158c2ecf20Sopenharmony_citransported. The dotted line marks only one example. The backend could also 168c2ecf20Sopenharmony_ciuse a character device, be in-kernel only, or something completely different:: 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci e.g. sysfs I2C slave events I/O registers 208c2ecf20Sopenharmony_ci +-----------+ v +---------+ v +--------+ v +------------+ 218c2ecf20Sopenharmony_ci | Userspace +........+ Backend +-----------+ Driver +-----+ Controller | 228c2ecf20Sopenharmony_ci +-----------+ +---------+ +--------+ +------------+ 238c2ecf20Sopenharmony_ci | | 248c2ecf20Sopenharmony_ci ----------------------------------------------------------------+-- I2C 258c2ecf20Sopenharmony_ci --------------------------------------------------------------+---- Bus 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ciNote: Technically, there is also the I2C core between the backend and the 288c2ecf20Sopenharmony_cidriver. However, at this time of writing, the layer is transparent. 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciUser manual 328c2ecf20Sopenharmony_ci=========== 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ciI2C slave backends behave like standard I2C clients. So, you can instantiate 358c2ecf20Sopenharmony_cithem as described in the document 'instantiating-devices'. The only difference 368c2ecf20Sopenharmony_ciis that i2c slave backends have their own address space. So, you have to add 378c2ecf20Sopenharmony_ci0x1000 to the address you would originally request. An example for 388c2ecf20Sopenharmony_ciinstantiating the slave-eeprom driver from userspace at the 7 bit address 0x64 398c2ecf20Sopenharmony_cion bus 1:: 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci # echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ciEach backend should come with separate documentation to describe its specific 448c2ecf20Sopenharmony_cibehaviour and setup. 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ciDeveloper manual 488c2ecf20Sopenharmony_ci================ 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ciFirst, the events which are used by the bus driver and the backend will be 518c2ecf20Sopenharmony_cidescribed in detail. After that, some implementation hints for extending bus 528c2ecf20Sopenharmony_cidrivers and writing backends will be given. 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ciI2C slave events 568c2ecf20Sopenharmony_ci---------------- 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ciThe bus driver sends an event to the backend using the following function:: 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci ret = i2c_slave_event(client, event, &val) 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci'client' describes the I2C slave device. 'event' is one of the special event 638c2ecf20Sopenharmony_citypes described hereafter. 'val' holds an u8 value for the data byte to be 648c2ecf20Sopenharmony_ciread/written and is thus bidirectional. The pointer to val must always be 658c2ecf20Sopenharmony_ciprovided even if val is not used for an event, i.e. don't use NULL here. 'ret' 668c2ecf20Sopenharmony_ciis the return value from the backend. Mandatory events must be provided by the 678c2ecf20Sopenharmony_cibus drivers and must be checked for by backend drivers. 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ciEvent types: 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci* I2C_SLAVE_WRITE_REQUESTED (mandatory) 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci 'val': unused 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci 'ret': always 0 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ciAnother I2C master wants to write data to us. This event should be sent once 788c2ecf20Sopenharmony_ciour own address and the write bit was detected. The data did not arrive yet, so 798c2ecf20Sopenharmony_cithere is nothing to process or return. Wakeup or initialization probably needs 808c2ecf20Sopenharmony_cito be done, though. 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci* I2C_SLAVE_READ_REQUESTED (mandatory) 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ci 'val': backend returns first byte to be sent 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci 'ret': always 0 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ciAnother I2C master wants to read data from us. This event should be sent once 898c2ecf20Sopenharmony_ciour own address and the read bit was detected. After returning, the bus driver 908c2ecf20Sopenharmony_cishould transmit the first byte. 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci* I2C_SLAVE_WRITE_RECEIVED (mandatory) 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ci 'val': bus driver delivers received byte 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci 'ret': 0 if the byte should be acked, some errno if the byte should be nacked 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ciAnother I2C master has sent a byte to us which needs to be set in 'val'. If 'ret' 998c2ecf20Sopenharmony_ciis zero, the bus driver should ack this byte. If 'ret' is an errno, then the byte 1008c2ecf20Sopenharmony_cishould be nacked. 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ci* I2C_SLAVE_READ_PROCESSED (mandatory) 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci 'val': backend returns next byte to be sent 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci 'ret': always 0 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ciThe bus driver requests the next byte to be sent to another I2C master in 1098c2ecf20Sopenharmony_ci'val'. Important: This does not mean that the previous byte has been acked, it 1108c2ecf20Sopenharmony_cionly means that the previous byte is shifted out to the bus! To ensure seamless 1118c2ecf20Sopenharmony_citransmission, most hardware requests the next byte when the previous one is 1128c2ecf20Sopenharmony_cistill shifted out. If the master sends NACK and stops reading after the byte 1138c2ecf20Sopenharmony_cicurrently shifted out, this byte requested here is never used. It very likely 1148c2ecf20Sopenharmony_cineeds to be sent again on the next I2C_SLAVE_READ_REQUEST, depending a bit on 1158c2ecf20Sopenharmony_ciyour backend, though. 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci* I2C_SLAVE_STOP (mandatory) 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci 'val': unused 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci 'ret': always 0 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ciA stop condition was received. This can happen anytime and the backend should 1248c2ecf20Sopenharmony_cireset its state machine for I2C transfers to be able to receive new requests. 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ciSoftware backends 1288c2ecf20Sopenharmony_ci----------------- 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ciIf you want to write a software backend: 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_ci* use a standard i2c_driver and its matching mechanisms 1338c2ecf20Sopenharmony_ci* write the slave_callback which handles the above slave events 1348c2ecf20Sopenharmony_ci (best using a state machine) 1358c2ecf20Sopenharmony_ci* register this callback via i2c_slave_register() 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ciCheck the i2c-slave-eeprom driver as an example. 1388c2ecf20Sopenharmony_ci 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ciBus driver support 1418c2ecf20Sopenharmony_ci------------------ 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ciIf you want to add slave support to the bus driver: 1448c2ecf20Sopenharmony_ci 1458c2ecf20Sopenharmony_ci* implement calls to register/unregister the slave and add those to the 1468c2ecf20Sopenharmony_ci struct i2c_algorithm. When registering, you probably need to set the I2C 1478c2ecf20Sopenharmony_ci slave address and enable slave specific interrupts. If you use runtime pm, you 1488c2ecf20Sopenharmony_ci should use pm_runtime_get_sync() because your device usually needs to be 1498c2ecf20Sopenharmony_ci powered on always to be able to detect its slave address. When unregistering, 1508c2ecf20Sopenharmony_ci do the inverse of the above. 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ci* Catch the slave interrupts and send appropriate i2c_slave_events to the backend. 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ciNote that most hardware supports being master _and_ slave on the same bus. So, 1558c2ecf20Sopenharmony_ciif you extend a bus driver, please make sure that the driver supports that as 1568c2ecf20Sopenharmony_ciwell. In almost all cases, slave support does not need to disable the master 1578c2ecf20Sopenharmony_cifunctionality. 1588c2ecf20Sopenharmony_ci 1598c2ecf20Sopenharmony_ciCheck the i2c-rcar driver as an example. 1608c2ecf20Sopenharmony_ci 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ciAbout ACK/NACK 1638c2ecf20Sopenharmony_ci-------------- 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ciIt is good behaviour to always ACK the address phase, so the master knows if a 1668c2ecf20Sopenharmony_cidevice is basically present or if it mysteriously disappeared. Using NACK to 1678c2ecf20Sopenharmony_cistate being busy is troublesome. SMBus demands to always ACK the address phase, 1688c2ecf20Sopenharmony_ciwhile the I2C specification is more loose on that. Most I2C controllers also 1698c2ecf20Sopenharmony_ciautomatically ACK when detecting their slave addresses, so there is no option 1708c2ecf20Sopenharmony_cito NACK them. For those reasons, this API does not support NACK in the address 1718c2ecf20Sopenharmony_ciphase. 1728c2ecf20Sopenharmony_ci 1738c2ecf20Sopenharmony_ciCurrently, there is no slave event to report if the master did ACK or NACK a 1748c2ecf20Sopenharmony_cibyte when it reads from us. We could make this an optional event if the need 1758c2ecf20Sopenharmony_ciarises. However, cases should be extremely rare because the master is expected 1768c2ecf20Sopenharmony_cito send STOP after that and we have an event for that. Also, keep in mind not 1778c2ecf20Sopenharmony_ciall I2C controllers have the possibility to report that event. 1788c2ecf20Sopenharmony_ci 1798c2ecf20Sopenharmony_ci 1808c2ecf20Sopenharmony_ciAbout buffers 1818c2ecf20Sopenharmony_ci------------- 1828c2ecf20Sopenharmony_ci 1838c2ecf20Sopenharmony_ciDuring development of this API, the question of using buffers instead of just 1848c2ecf20Sopenharmony_cibytes came up. Such an extension might be possible, usefulness is unclear at 1858c2ecf20Sopenharmony_cithis time of writing. Some points to keep in mind when using buffers: 1868c2ecf20Sopenharmony_ci 1878c2ecf20Sopenharmony_ci* Buffers should be opt-in and backend drivers will always have to support 1888c2ecf20Sopenharmony_ci byte-based transactions as the ultimate fallback anyhow because this is how 1898c2ecf20Sopenharmony_ci the majority of HW works. 1908c2ecf20Sopenharmony_ci 1918c2ecf20Sopenharmony_ci* For backends simulating hardware registers, buffers are largely not helpful 1928c2ecf20Sopenharmony_ci because after each byte written an action should be immediately triggered. 1938c2ecf20Sopenharmony_ci For reads, the data kept in the buffer might get stale if the backend just 1948c2ecf20Sopenharmony_ci updated a register because of internal processing. 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_ci* A master can send STOP at any time. For partially transferred buffers, this 1978c2ecf20Sopenharmony_ci means additional code to handle this exception. Such code tends to be 1988c2ecf20Sopenharmony_ci error-prone. 199