18c2ecf20Sopenharmony_ciSerial Peripheral Interface (SPI)
28c2ecf20Sopenharmony_ci=================================
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48c2ecf20Sopenharmony_ciSPI is the "Serial Peripheral Interface", widely used with embedded
58c2ecf20Sopenharmony_cisystems because it is a simple and efficient interface: basically a
68c2ecf20Sopenharmony_cimultiplexed shift register. Its three signal wires hold a clock (SCK,
78c2ecf20Sopenharmony_cioften in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
88c2ecf20Sopenharmony_ciline, and a "Master In, Slave Out" (MISO) data line. SPI is a full
98c2ecf20Sopenharmony_ciduplex protocol; for each bit shifted out the MOSI line (one per clock)
108c2ecf20Sopenharmony_cianother is shifted in on the MISO line. Those bits are assembled into
118c2ecf20Sopenharmony_ciwords of various sizes on the way to and from system memory. An
128c2ecf20Sopenharmony_ciadditional chipselect line is usually active-low (nCS); four signals are
138c2ecf20Sopenharmony_cinormally used for each peripheral, plus sometimes an interrupt.
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158c2ecf20Sopenharmony_ciThe SPI bus facilities listed here provide a generalized interface to
168c2ecf20Sopenharmony_cideclare SPI busses and devices, manage them according to the standard
178c2ecf20Sopenharmony_ciLinux driver model, and perform input/output operations. At this time,
188c2ecf20Sopenharmony_cionly "master" side interfaces are supported, where Linux talks to SPI
198c2ecf20Sopenharmony_ciperipherals and does not implement such a peripheral itself. (Interfaces
208c2ecf20Sopenharmony_cito support implementing SPI slaves would necessarily look different.)
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228c2ecf20Sopenharmony_ciThe programming interface is structured around two kinds of driver, and
238c2ecf20Sopenharmony_citwo kinds of device. A "Controller Driver" abstracts the controller
248c2ecf20Sopenharmony_cihardware, which may be as simple as a set of GPIO pins or as complex as
258c2ecf20Sopenharmony_cia pair of FIFOs connected to dual DMA engines on the other side of the
268c2ecf20Sopenharmony_ciSPI shift register (maximizing throughput). Such drivers bridge between
278c2ecf20Sopenharmony_ciwhatever bus they sit on (often the platform bus) and SPI, and expose
288c2ecf20Sopenharmony_cithe SPI side of their device as a :c:type:`struct spi_controller
298c2ecf20Sopenharmony_ci<spi_controller>`. SPI devices are children of that master,
308c2ecf20Sopenharmony_cirepresented as a :c:type:`struct spi_device <spi_device>` and
318c2ecf20Sopenharmony_cimanufactured from :c:type:`struct spi_board_info
328c2ecf20Sopenharmony_ci<spi_board_info>` descriptors which are usually provided by
338c2ecf20Sopenharmony_ciboard-specific initialization code. A :c:type:`struct spi_driver
348c2ecf20Sopenharmony_ci<spi_driver>` is called a "Protocol Driver", and is bound to a
358c2ecf20Sopenharmony_cispi_device using normal driver model calls.
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378c2ecf20Sopenharmony_ciThe I/O model is a set of queued messages. Protocol drivers submit one
388c2ecf20Sopenharmony_cior more :c:type:`struct spi_message <spi_message>` objects,
398c2ecf20Sopenharmony_ciwhich are processed and completed asynchronously. (There are synchronous
408c2ecf20Sopenharmony_ciwrappers, however.) Messages are built from one or more
418c2ecf20Sopenharmony_ci:c:type:`struct spi_transfer <spi_transfer>` objects, each of
428c2ecf20Sopenharmony_ciwhich wraps a full duplex SPI transfer. A variety of protocol tweaking
438c2ecf20Sopenharmony_cioptions are needed, because different chips adopt very different
448c2ecf20Sopenharmony_cipolicies for how they use the bits transferred with SPI.
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468c2ecf20Sopenharmony_ci.. kernel-doc:: include/linux/spi/spi.h
478c2ecf20Sopenharmony_ci   :internal:
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci.. kernel-doc:: drivers/spi/spi.c
508c2ecf20Sopenharmony_ci   :functions: spi_register_board_info
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci.. kernel-doc:: drivers/spi/spi.c
538c2ecf20Sopenharmony_ci   :export:
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