18c2ecf20Sopenharmony_ci.. SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe cpia2 driver 48c2ecf20Sopenharmony_ci================ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciAuthors: Peter Pregler <Peter_Pregler@email.com>, 78c2ecf20Sopenharmony_ciScott J. Bertin <scottbertin@yahoo.com>, and 88c2ecf20Sopenharmony_ciJarl Totland <Jarl.Totland@bdc.no> for the original cpia driver, which 98c2ecf20Sopenharmony_cithis one was modelled from. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciNotes to developers 138c2ecf20Sopenharmony_ci~~~~~~~~~~~~~~~~~~~ 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci - This is a driver version stripped of the 2.4 back compatibility 168c2ecf20Sopenharmony_ci and old MJPEG ioctl API. See cpia2.sf.net for 2.4 support. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciProgrammer's overview of cpia2 driver 198c2ecf20Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciCpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a 228c2ecf20Sopenharmony_cidivision of ST Microelectronics). There are two versions. The first is the 238c2ecf20Sopenharmony_ciSTV0672, which is capable of up to 30 frames per second (fps) in frame sizes 248c2ecf20Sopenharmony_ciup to CIF, and 15 fps for VGA frames. The STV0676 is an improved version, 258c2ecf20Sopenharmony_ciwhich can handle up to 30 fps VGA. Both coprocessors can be attached to two 268c2ecf20Sopenharmony_ciCMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor. These will 278c2ecf20Sopenharmony_cibe referred to as the 410 and the 500 sensors, or the CIF and VGA sensors. 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ciThe two chipsets operate almost identically. The core is an 8051 processor, 308c2ecf20Sopenharmony_cirunning two different versions of firmware. The 672 runs the VP4 video 318c2ecf20Sopenharmony_ciprocessor code, the 676 runs VP5. There are a few differences in register 328c2ecf20Sopenharmony_cimappings for the two chips. In these cases, the symbols defined in the 338c2ecf20Sopenharmony_ciheader files are marked with VP4 or VP5 as part of the symbol name. 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciThe cameras appear externally as three sets of registers. Setting register 368c2ecf20Sopenharmony_civalues is the only way to control the camera. Some settings are 378c2ecf20Sopenharmony_ciinterdependant, such as the sequence required to power up the camera. I will 388c2ecf20Sopenharmony_citry to make note of all of these cases. 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ciThe register sets are called blocks. Block 0 is the system block. This 418c2ecf20Sopenharmony_cisection is always powered on when the camera is plugged in. It contains 428c2ecf20Sopenharmony_ciregisters that control housekeeping functions such as powering up the video 438c2ecf20Sopenharmony_ciprocessor. The video processor is the VP block. These registers control 448c2ecf20Sopenharmony_cihow the video from the sensor is processed. Examples are timing registers, 458c2ecf20Sopenharmony_ciuser mode (vga, qvga), scaling, cropping, framerates, and so on. The last 468c2ecf20Sopenharmony_ciblock is the video compressor (VC). The video stream sent from the camera is 478c2ecf20Sopenharmony_cicompressed as Motion JPEG (JPEGA). The VC controls all of the compression 488c2ecf20Sopenharmony_ciparameters. Looking at the file cpia2_registers.h, you can get a full view 498c2ecf20Sopenharmony_ciof these registers and the possible values for most of them. 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ciOne or more registers can be set or read by sending a usb control message to 528c2ecf20Sopenharmony_cithe camera. There are three modes for this. Block mode requests a number 538c2ecf20Sopenharmony_ciof contiguous registers. Random mode reads or writes random registers with 548c2ecf20Sopenharmony_cia tuple structure containing address/value pairs. The repeat mode is only 558c2ecf20Sopenharmony_ciused by VP4 to load a firmware patch. It contains a starting address and 568c2ecf20Sopenharmony_cia sequence of bytes to be written into a gpio port. 57