18c2ecf20Sopenharmony_ciIntroduction 28c2ecf20Sopenharmony_ci============ 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe FPGA subsystem supports reprogramming FPGAs dynamically under 58c2ecf20Sopenharmony_ciLinux. Some of the core intentions of the FPGA subsystems are: 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci* The FPGA subsystem is vendor agnostic. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci* The FPGA subsystem separates upper layers (userspace interfaces and 108c2ecf20Sopenharmony_ci enumeration) from lower layers that know how to program a specific 118c2ecf20Sopenharmony_ci FPGA. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci* Code should not be shared between upper and lower layers. This 148c2ecf20Sopenharmony_ci should go without saying. If that seems necessary, there's probably 158c2ecf20Sopenharmony_ci framework functionality that can be added that will benefit 168c2ecf20Sopenharmony_ci other users. Write the linux-fpga mailing list and maintainers and 178c2ecf20Sopenharmony_ci seek out a solution that expands the framework for broad reuse. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci* Generally, when adding code, think of the future. Plan for reuse. 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciThe framework in the kernel is divided into: 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ciFPGA Manager 248c2ecf20Sopenharmony_ci------------ 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciIf you are adding a new FPGA or a new method of programming an FPGA, 278c2ecf20Sopenharmony_cithis is the subsystem for you. Low level FPGA manager drivers contain 288c2ecf20Sopenharmony_cithe knowledge of how to program a specific device. This subsystem 298c2ecf20Sopenharmony_ciincludes the framework in fpga-mgr.c and the low level drivers that 308c2ecf20Sopenharmony_ciare registered with it. 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ciFPGA Bridge 338c2ecf20Sopenharmony_ci----------- 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciFPGA Bridges prevent spurious signals from going out of an FPGA or a 368c2ecf20Sopenharmony_ciregion of an FPGA during programming. They are disabled before 378c2ecf20Sopenharmony_ciprogramming begins and re-enabled afterwards. An FPGA bridge may be 388c2ecf20Sopenharmony_ciactual hard hardware that gates a bus to a CPU or a soft ("freeze") 398c2ecf20Sopenharmony_cibridge in FPGA fabric that surrounds a partial reconfiguration region 408c2ecf20Sopenharmony_ciof an FPGA. This subsystem includes fpga-bridge.c and the low level 418c2ecf20Sopenharmony_cidrivers that are registered with it. 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ciFPGA Region 448c2ecf20Sopenharmony_ci----------- 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ciIf you are adding a new interface to the FPGA framework, add it on top 478c2ecf20Sopenharmony_ciof an FPGA region. 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ciThe FPGA Region framework (fpga-region.c) associates managers and 508c2ecf20Sopenharmony_cibridges as reconfigurable regions. A region may refer to the whole 518c2ecf20Sopenharmony_ciFPGA in full reconfiguration or to a partial reconfiguration region. 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ciThe Device Tree FPGA Region support (of-fpga-region.c) handles 548c2ecf20Sopenharmony_cireprogramming FPGAs when device tree overlays are applied. 55