18c2ecf20Sopenharmony_ci* Atmel Watchdog Timers
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ci** at91sam9-wdt
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ciRequired properties:
68c2ecf20Sopenharmony_ci- compatible: must be "atmel,at91sam9260-wdt".
78c2ecf20Sopenharmony_ci- reg: physical base address of the controller and length of memory mapped
88c2ecf20Sopenharmony_ci  region.
98c2ecf20Sopenharmony_ci- clocks: phandle to input clock.
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ciOptional properties:
128c2ecf20Sopenharmony_ci- timeout-sec: contains the watchdog timeout in seconds.
138c2ecf20Sopenharmony_ci- interrupts : Should contain WDT interrupt.
148c2ecf20Sopenharmony_ci- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
158c2ecf20Sopenharmony_ci	seconds. This value should be less or equal to 16. It is used to
168c2ecf20Sopenharmony_ci	compute the WDV field.
178c2ecf20Sopenharmony_ci- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
188c2ecf20Sopenharmony_ci	seconds. This value must be smaller than the max-heartbeat-sec value.
198c2ecf20Sopenharmony_ci	It is used to compute the WDD field.
208c2ecf20Sopenharmony_ci- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
218c2ecf20Sopenharmony_ci	use the at91 watchdog reset. Software watchdog use the watchdog
228c2ecf20Sopenharmony_ci	interrupt to trigger a software reset.
238c2ecf20Sopenharmony_ci- atmel,reset-type : Should be "proc" or "all".
248c2ecf20Sopenharmony_ci	"all" : assert peripherals and processor reset signals
258c2ecf20Sopenharmony_ci	"proc" : assert the processor reset signal
268c2ecf20Sopenharmony_ci	This is valid only when using "hardware" watchdog.
278c2ecf20Sopenharmony_ci- atmel,disable : Should be present if you want to disable the watchdog.
288c2ecf20Sopenharmony_ci- atmel,idle-halt : Should be present if you want to stop the watchdog when
298c2ecf20Sopenharmony_ci	entering idle state.
308c2ecf20Sopenharmony_ci	CAUTION: This property should be used with care, it actually makes the
318c2ecf20Sopenharmony_ci	watchdog not counting when the CPU is in idle state, therefore the
328c2ecf20Sopenharmony_ci	watchdog reset time depends on mean CPU usage and will not reset at all
338c2ecf20Sopenharmony_ci	if the CPU stop working while it is in idle state, which is probably
348c2ecf20Sopenharmony_ci	not what you want.
358c2ecf20Sopenharmony_ci- atmel,dbg-halt : Should be present if you want to stop the watchdog when
368c2ecf20Sopenharmony_ci	entering debug state.
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ciExample:
398c2ecf20Sopenharmony_ci	watchdog@fffffd40 {
408c2ecf20Sopenharmony_ci		compatible = "atmel,at91sam9260-wdt";
418c2ecf20Sopenharmony_ci		reg = <0xfffffd40 0x10>;
428c2ecf20Sopenharmony_ci		interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
438c2ecf20Sopenharmony_ci		clocks = <&clk32k>;
448c2ecf20Sopenharmony_ci		timeout-sec = <15>;
458c2ecf20Sopenharmony_ci		atmel,watchdog-type = "hardware";
468c2ecf20Sopenharmony_ci		atmel,reset-type = "all";
478c2ecf20Sopenharmony_ci		atmel,dbg-halt;
488c2ecf20Sopenharmony_ci		atmel,idle-halt;
498c2ecf20Sopenharmony_ci		atmel,max-heartbeat-sec = <16>;
508c2ecf20Sopenharmony_ci		atmel,min-heartbeat-sec = <0>;
518c2ecf20Sopenharmony_ci	};
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