18c2ecf20Sopenharmony_ciSamsung High Speed USB OTG controller 28c2ecf20Sopenharmony_ci----------------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe Samsung HSOTG IP can be found on Samsung SoCs, from S3C6400 onwards. 58c2ecf20Sopenharmony_ciIt gives functionality of OTG-compliant USB 2.0 host and device with 68c2ecf20Sopenharmony_cisupport for USB 2.0 high-speed (480Mbps) and full-speed (12 Mbps) 78c2ecf20Sopenharmony_cioperation. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciCurrently only device mode is supported. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciBinding details 128c2ecf20Sopenharmony_ci----- 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciRequired properties: 158c2ecf20Sopenharmony_ci- compatible: "samsung,s3c6400-hsotg" should be used for all currently 168c2ecf20Sopenharmony_ci supported SoC, 178c2ecf20Sopenharmony_ci- interrupts: specifier of interrupt signal of interrupt controller, 188c2ecf20Sopenharmony_ci according to bindings of interrupt controller, 198c2ecf20Sopenharmony_ci- clocks: contains an array of clock specifiers: 208c2ecf20Sopenharmony_ci - first entry: OTG clock 218c2ecf20Sopenharmony_ci- clock-names: contains array of clock names: 228c2ecf20Sopenharmony_ci - first entry: must be "otg" 238c2ecf20Sopenharmony_ci- vusb_d-supply: phandle to voltage regulator of digital section, 248c2ecf20Sopenharmony_ci- vusb_a-supply: phandle to voltage regulator of analog section. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciExample 278c2ecf20Sopenharmony_ci----- 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci hsotg@12480000 { 308c2ecf20Sopenharmony_ci compatible = "samsung,s3c6400-hsotg"; 318c2ecf20Sopenharmony_ci reg = <0x12480000 0x20000>; 328c2ecf20Sopenharmony_ci interrupts = <0 71 0>; 338c2ecf20Sopenharmony_ci clocks = <&clock 305>; 348c2ecf20Sopenharmony_ci clock-names = "otg"; 358c2ecf20Sopenharmony_ci vusb_d-supply = <&vusb_reg>; 368c2ecf20Sopenharmony_ci vusb_a-supply = <&vusbdac_reg>; 378c2ecf20Sopenharmony_ci }; 388c2ecf20Sopenharmony_ci 39