18c2ecf20Sopenharmony_ciOMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciOMAP MUSB GLUE
48c2ecf20Sopenharmony_ci - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
58c2ecf20Sopenharmony_ci - ti,hwmods : must be "usb_otg_hs"
68c2ecf20Sopenharmony_ci - multipoint : Should be "1" indicating the musb controller supports
78c2ecf20Sopenharmony_ci   multipoint. This is a MUSB configuration-specific setting.
88c2ecf20Sopenharmony_ci - num-eps : Specifies the number of endpoints. This is also a
98c2ecf20Sopenharmony_ci   MUSB configuration-specific setting. Should be set to "16"
108c2ecf20Sopenharmony_ci - ram-bits : Specifies the ram address size. Should be set to "12"
118c2ecf20Sopenharmony_ci - interface-type : This is a board specific setting to describe the type of
128c2ecf20Sopenharmony_ci   interface between the controller and the phy. It should be "0" or "1"
138c2ecf20Sopenharmony_ci   specifying ULPI and UTMI respectively.
148c2ecf20Sopenharmony_ci - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
158c2ecf20Sopenharmony_ci   represents PERIPHERAL.
168c2ecf20Sopenharmony_ci - power : Should be "50". This signifies the controller can supply up to
178c2ecf20Sopenharmony_ci   100mA when operating in host mode.
188c2ecf20Sopenharmony_ci - usb-phy : the phandle for the PHY device
198c2ecf20Sopenharmony_ci - phys : the phandle for the PHY device (used by generic PHY framework)
208c2ecf20Sopenharmony_ci - phy-names : the names of the PHY corresponding to the PHYs present in the
218c2ecf20Sopenharmony_ci   *phy* phandle.
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciOptional properties:
248c2ecf20Sopenharmony_ci - ctrl-module : phandle of the control module this glue uses to write to
258c2ecf20Sopenharmony_ci   mailbox
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ciSOC specific device node entry
288c2ecf20Sopenharmony_ciusb_otg_hs: usb_otg_hs@4a0ab000 {
298c2ecf20Sopenharmony_ci	compatible = "ti,omap4-musb";
308c2ecf20Sopenharmony_ci	ti,hwmods = "usb_otg_hs";
318c2ecf20Sopenharmony_ci	multipoint = <1>;
328c2ecf20Sopenharmony_ci	num-eps = <16>;
338c2ecf20Sopenharmony_ci	ram-bits = <12>;
348c2ecf20Sopenharmony_ci	ctrl-module = <&omap_control_usb>;
358c2ecf20Sopenharmony_ci	phys = <&usb2_phy>;
368c2ecf20Sopenharmony_ci	phy-names = "usb2-phy";
378c2ecf20Sopenharmony_ci};
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ciBoard specific device node entry
408c2ecf20Sopenharmony_ci&usb_otg_hs {
418c2ecf20Sopenharmony_ci	interface-type = <1>;
428c2ecf20Sopenharmony_ci	mode = <3>;
438c2ecf20Sopenharmony_ci	power = <50>;
448c2ecf20Sopenharmony_ci};
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ciOMAP DWC3 GLUE
478c2ecf20Sopenharmony_ci - compatible : Should be
488c2ecf20Sopenharmony_ci	* "ti,dwc3" for OMAP5 and DRA7
498c2ecf20Sopenharmony_ci	* "ti,am437x-dwc3" for AM437x
508c2ecf20Sopenharmony_ci - ti,hwmods : Should be "usb_otg_ss"
518c2ecf20Sopenharmony_ci - reg : Address and length of the register set for the device.
528c2ecf20Sopenharmony_ci - interrupts : The irq number of this device that is used to interrupt the
538c2ecf20Sopenharmony_ci   MPU
548c2ecf20Sopenharmony_ci - #address-cells, #size-cells : Must be present if the device has sub-nodes
558c2ecf20Sopenharmony_ci - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
568c2ecf20Sopenharmony_ci   It should be set to "1" for HW mode and "2" for SW mode.
578c2ecf20Sopenharmony_ci - ranges: the child address space are mapped 1:1 onto the parent address space
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ciOptional Properties:
608c2ecf20Sopenharmony_ci - extcon : phandle for the extcon device omap dwc3 uses to detect
618c2ecf20Sopenharmony_ci   connect/disconnect events.
628c2ecf20Sopenharmony_ci - vbus-supply : phandle to the regulator device tree node if needed.
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ciSub-nodes:
658c2ecf20Sopenharmony_ciThe dwc3 core should be added as subnode to omap dwc3 glue.
668c2ecf20Sopenharmony_ci- dwc3 :
678c2ecf20Sopenharmony_ci   The binding details of dwc3 can be found in:
688c2ecf20Sopenharmony_ci   Documentation/devicetree/bindings/usb/dwc3.txt
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ciomap_dwc3 {
718c2ecf20Sopenharmony_ci	compatible = "ti,dwc3";
728c2ecf20Sopenharmony_ci	ti,hwmods = "usb_otg_ss";
738c2ecf20Sopenharmony_ci	reg = <0x4a020000 0x1ff>;
748c2ecf20Sopenharmony_ci	interrupts = <0 93 4>;
758c2ecf20Sopenharmony_ci	#address-cells = <1>;
768c2ecf20Sopenharmony_ci	#size-cells = <1>;
778c2ecf20Sopenharmony_ci	utmi-mode = <2>;
788c2ecf20Sopenharmony_ci	ranges;
798c2ecf20Sopenharmony_ci};
808c2ecf20Sopenharmony_ci
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