18c2ecf20Sopenharmony_ciThe device node for Mediatek USB3.0 DRD controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
58c2ecf20Sopenharmony_ci	soc-model is the name of SoC, such as mt8173, mt2712 etc,
68c2ecf20Sopenharmony_ci	when using "mediatek,mtu3" compatible string, you need SoC specific
78c2ecf20Sopenharmony_ci	ones in addition, one of:
88c2ecf20Sopenharmony_ci	- "mediatek,mt8173-mtu3"
98c2ecf20Sopenharmony_ci - reg : specifies physical base address and size of the registers
108c2ecf20Sopenharmony_ci - reg-names: should be "mac" for device IP and "ippc" for IP port control
118c2ecf20Sopenharmony_ci - interrupts : interrupt used by the device IP
128c2ecf20Sopenharmony_ci - power-domains : a phandle to USB power domain node to control USB's
138c2ecf20Sopenharmony_ci	mtcmos
148c2ecf20Sopenharmony_ci - vusb33-supply : regulator of USB avdd3.3v
158c2ecf20Sopenharmony_ci - clocks : a list of phandle + clock-specifier pairs, one for each
168c2ecf20Sopenharmony_ci	entry in clock-names
178c2ecf20Sopenharmony_ci - clock-names : must contain "sys_ck" for clock of controller,
188c2ecf20Sopenharmony_ci	the following clocks are optional:
198c2ecf20Sopenharmony_ci	"ref_ck", "mcu_ck" and "dma_ck";
208c2ecf20Sopenharmony_ci - phys : see usb-hcd.yaml in the current directory
218c2ecf20Sopenharmony_ci - dr_mode : should be one of "host", "peripheral" or "otg",
228c2ecf20Sopenharmony_ci	refer to usb/generic.txt
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ciOptional properties:
258c2ecf20Sopenharmony_ci - #address-cells, #size-cells : should be '2' if the device has sub-nodes
268c2ecf20Sopenharmony_ci	with 'reg' property
278c2ecf20Sopenharmony_ci - ranges : allows valid 1:1 translation between child's address space and
288c2ecf20Sopenharmony_ci	parent's address space
298c2ecf20Sopenharmony_ci - extcon : external connector for vbus and idpin changes detection, needed
308c2ecf20Sopenharmony_ci	when supports dual-role mode.
318c2ecf20Sopenharmony_ci	it's considered valid for compatibility reasons, not allowed for
328c2ecf20Sopenharmony_ci	new bindings, and use "usb-role-switch" property instead.
338c2ecf20Sopenharmony_ci - vbus-supply : reference to the VBUS regulator, needed when supports
348c2ecf20Sopenharmony_ci	dual-role mode.
358c2ecf20Sopenharmony_ci	it's considered valid for compatibility reasons, not allowed for
368c2ecf20Sopenharmony_ci	new bindings, and put into a usb-connector node.
378c2ecf20Sopenharmony_ci	see connector/usb-connector.yaml.
388c2ecf20Sopenharmony_ci - pinctrl-names : a pinctrl state named "default" is optional, and need be
398c2ecf20Sopenharmony_ci	defined if auto drd switch is enabled, that means the property dr_mode
408c2ecf20Sopenharmony_ci	is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
418c2ecf20Sopenharmony_ci	is not set.
428c2ecf20Sopenharmony_ci - pinctrl-0 : pin control group
438c2ecf20Sopenharmony_ci	See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci - maximum-speed : valid arguments are "super-speed", "high-speed" and
468c2ecf20Sopenharmony_ci	"full-speed"; refer to usb/generic.txt
478c2ecf20Sopenharmony_ci - usb-role-switch : use USB Role Switch to support dual-role switch, but
488c2ecf20Sopenharmony_ci	not extcon; see usb/generic.txt.
498c2ecf20Sopenharmony_ci - enable-manual-drd : supports manual dual-role switch via debugfs; usually
508c2ecf20Sopenharmony_ci	used when receptacle is TYPE-A and also wants to support dual-role
518c2ecf20Sopenharmony_ci	mode.
528c2ecf20Sopenharmony_ci - wakeup-source: enable USB remote wakeup of host mode.
538c2ecf20Sopenharmony_ci - mediatek,syscon-wakeup : phandle to syscon used to access the register
548c2ecf20Sopenharmony_ci	of the USB wakeup glue layer between SSUSB and SPM; it depends on
558c2ecf20Sopenharmony_ci	"wakeup-source", and has two arguments:
568c2ecf20Sopenharmony_ci	- the first one : register base address of the glue layer in syscon;
578c2ecf20Sopenharmony_ci	- the second one : hardware version of the glue layer
588c2ecf20Sopenharmony_ci		- 1 : used by mt8173 etc
598c2ecf20Sopenharmony_ci		- 2 : used by mt2712 etc
608c2ecf20Sopenharmony_ci - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
618c2ecf20Sopenharmony_ci	bit1 for u3port1, ... etc;
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_ciadditionally the properties from usb-hcd.yaml (in the current directory) are
648c2ecf20Sopenharmony_cisupported.
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ciSub-nodes:
678c2ecf20Sopenharmony_ciThe xhci should be added as subnode to mtu3 as shown in the following example
688c2ecf20Sopenharmony_ciif host mode is enabled. The DT binding details of xhci can be found in:
698c2ecf20Sopenharmony_ciDocumentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ciThe port would be added as subnode if use "usb-role-switch" property.
728c2ecf20Sopenharmony_ci	see graph.txt
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ciExample:
758c2ecf20Sopenharmony_cissusb: usb@11271000 {
768c2ecf20Sopenharmony_ci	compatible = "mediatek,mt8173-mtu3";
778c2ecf20Sopenharmony_ci	reg = <0 0x11271000 0 0x3000>,
788c2ecf20Sopenharmony_ci	      <0 0x11280700 0 0x0100>;
798c2ecf20Sopenharmony_ci	reg-names = "mac", "ippc";
808c2ecf20Sopenharmony_ci	interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
818c2ecf20Sopenharmony_ci	phys = <&phy_port0 PHY_TYPE_USB3>,
828c2ecf20Sopenharmony_ci	       <&phy_port1 PHY_TYPE_USB2>;
838c2ecf20Sopenharmony_ci	power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
848c2ecf20Sopenharmony_ci	clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
858c2ecf20Sopenharmony_ci		 <&pericfg CLK_PERI_USB0>,
868c2ecf20Sopenharmony_ci		 <&pericfg CLK_PERI_USB1>;
878c2ecf20Sopenharmony_ci	clock-names = "sys_ck", "ref_ck";
888c2ecf20Sopenharmony_ci	vusb33-supply = <&mt6397_vusb_reg>;
898c2ecf20Sopenharmony_ci	vbus-supply = <&usb_p0_vbus>;
908c2ecf20Sopenharmony_ci	extcon = <&extcon_usb>;
918c2ecf20Sopenharmony_ci	dr_mode = "otg";
928c2ecf20Sopenharmony_ci	wakeup-source;
938c2ecf20Sopenharmony_ci	mediatek,syscon-wakeup = <&pericfg 0x400 1>;
948c2ecf20Sopenharmony_ci	#address-cells = <2>;
958c2ecf20Sopenharmony_ci	#size-cells = <2>;
968c2ecf20Sopenharmony_ci	ranges;
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci	usb_host: xhci@11270000 {
998c2ecf20Sopenharmony_ci		compatible = "mediatek,mt8173-xhci";
1008c2ecf20Sopenharmony_ci		reg = <0 0x11270000 0 0x1000>;
1018c2ecf20Sopenharmony_ci		reg-names = "mac";
1028c2ecf20Sopenharmony_ci		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
1038c2ecf20Sopenharmony_ci		power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
1048c2ecf20Sopenharmony_ci		clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
1058c2ecf20Sopenharmony_ci		clock-names = "sys_ck", "ref_ck";
1068c2ecf20Sopenharmony_ci		vusb33-supply = <&mt6397_vusb_reg>;
1078c2ecf20Sopenharmony_ci	};
1088c2ecf20Sopenharmony_ci};
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