18c2ecf20Sopenharmony_ciSamsung Exynos SoC USB controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThe USB devices interface with USB controllers on Exynos SOCs.
48c2ecf20Sopenharmony_ciThe device node has following properties.
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ciEHCI
78c2ecf20Sopenharmony_ciRequired properties:
88c2ecf20Sopenharmony_ci - compatible: should be "samsung,exynos4210-ehci" for USB 2.0
98c2ecf20Sopenharmony_ci   EHCI controller in host mode.
108c2ecf20Sopenharmony_ci - reg: physical base address of the controller and length of memory mapped
118c2ecf20Sopenharmony_ci   region.
128c2ecf20Sopenharmony_ci - interrupts: interrupt number to the cpu.
138c2ecf20Sopenharmony_ci - clocks: from common clock binding: handle to usb clock.
148c2ecf20Sopenharmony_ci - clock-names: from common clock binding: Shall be "usbhost".
158c2ecf20Sopenharmony_ci - phys: from the *Generic PHY* bindings; array specifying phy(s) used
168c2ecf20Sopenharmony_ci   by the root port.
178c2ecf20Sopenharmony_ci - phy-names: from the *Generic PHY* bindings; array of the names for
188c2ecf20Sopenharmony_ci   each phy for the root ports, must be a subset of the following:
198c2ecf20Sopenharmony_ci   "host", "hsic0", "hsic1".
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ciOptional properties:
228c2ecf20Sopenharmony_ci - samsung,vbus-gpio:  if present, specifies the GPIO that
238c2ecf20Sopenharmony_ci   needs to be pulled up for the bus to be powered.
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ciExample:
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci	usb@12110000 {
288c2ecf20Sopenharmony_ci		compatible = "samsung,exynos4210-ehci";
298c2ecf20Sopenharmony_ci		reg = <0x12110000 0x100>;
308c2ecf20Sopenharmony_ci		interrupts = <0 71 0>;
318c2ecf20Sopenharmony_ci		samsung,vbus-gpio = <&gpx2 6 1 3 3>;
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci		clocks = <&clock 285>;
348c2ecf20Sopenharmony_ci		clock-names = "usbhost";
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci		phys = <&usb2phy 1>;
378c2ecf20Sopenharmony_ci		phy-names = "host";
388c2ecf20Sopenharmony_ci	};
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ciOHCI
418c2ecf20Sopenharmony_ciRequired properties:
428c2ecf20Sopenharmony_ci - compatible: should be "samsung,exynos4210-ohci" for USB 2.0
438c2ecf20Sopenharmony_ci   OHCI companion controller in host mode.
448c2ecf20Sopenharmony_ci - reg: physical base address of the controller and length of memory mapped
458c2ecf20Sopenharmony_ci   region.
468c2ecf20Sopenharmony_ci - interrupts: interrupt number to the cpu.
478c2ecf20Sopenharmony_ci - clocks: from common clock binding: handle to usb clock.
488c2ecf20Sopenharmony_ci - clock-names: from common clock binding: Shall be "usbhost".
498c2ecf20Sopenharmony_ci - phys: from the *Generic PHY* bindings; array specifying phy(s) used
508c2ecf20Sopenharmony_ci   by the root port.
518c2ecf20Sopenharmony_ci - phy-names: from the *Generic PHY* bindings; array of the names for
528c2ecf20Sopenharmony_ci   each phy for the root ports, must be a subset of the following:
538c2ecf20Sopenharmony_ci   "host", "hsic0", "hsic1".
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ciExample:
568c2ecf20Sopenharmony_ci	usb@12120000 {
578c2ecf20Sopenharmony_ci		compatible = "samsung,exynos4210-ohci";
588c2ecf20Sopenharmony_ci		reg = <0x12120000 0x100>;
598c2ecf20Sopenharmony_ci		interrupts = <0 71 0>;
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci		clocks = <&clock 285>;
628c2ecf20Sopenharmony_ci		clock-names = "usbhost";
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci		phys = <&usb2phy 1>;
658c2ecf20Sopenharmony_ci		phy-names = "host";
668c2ecf20Sopenharmony_ci	};
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ciDWC3
698c2ecf20Sopenharmony_ciRequired properties:
708c2ecf20Sopenharmony_ci - compatible: should be one of the following -
718c2ecf20Sopenharmony_ci	       "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on
728c2ecf20Sopenharmony_ci					    Exynos5250/5420.
738c2ecf20Sopenharmony_ci	       "samsung,exynos5433-dwusb3": for USB 3.0 DWC3 controller on
748c2ecf20Sopenharmony_ci					    Exynos5433.
758c2ecf20Sopenharmony_ci	       "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7.
768c2ecf20Sopenharmony_ci - #address-cells, #size-cells : should be '1' if the device has sub-nodes
778c2ecf20Sopenharmony_ci				 with 'reg' property.
788c2ecf20Sopenharmony_ci - ranges: allows valid 1:1 translation between child's address space and
798c2ecf20Sopenharmony_ci	   parent's address space
808c2ecf20Sopenharmony_ci - clocks: Clock IDs array as required by the controller.
818c2ecf20Sopenharmony_ci - clock-names: Names of clocks corresponding to IDs in the clock property.
828c2ecf20Sopenharmony_ci                Following clock names shall be provided for different
838c2ecf20Sopenharmony_ci                compatibles:
848c2ecf20Sopenharmony_ci                 - samsung,exynos5250-dwusb3: "usbdrd30",
858c2ecf20Sopenharmony_ci                 - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk",
868c2ecf20Sopenharmony_ci                                              "phyclk",
878c2ecf20Sopenharmony_ci                 - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk",
888c2ecf20Sopenharmony_ci                                           "usbdrd30_axius_clk"
898c2ecf20Sopenharmony_ci - vdd10-supply: 1.0V powr supply
908c2ecf20Sopenharmony_ci - vdd33-supply: 3.0V/3.3V power supply
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ciSub-nodes:
938c2ecf20Sopenharmony_ciThe dwc3 core should be added as subnode to Exynos dwc3 glue.
948c2ecf20Sopenharmony_ci- dwc3 :
958c2ecf20Sopenharmony_ci   The binding details of dwc3 can be found in:
968c2ecf20Sopenharmony_ci   Documentation/devicetree/bindings/usb/dwc3.txt
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ciExample:
998c2ecf20Sopenharmony_ci	usb@12000000 {
1008c2ecf20Sopenharmony_ci		compatible = "samsung,exynos5250-dwusb3";
1018c2ecf20Sopenharmony_ci		clocks = <&clock 286>;
1028c2ecf20Sopenharmony_ci		clock-names = "usbdrd30";
1038c2ecf20Sopenharmony_ci		#address-cells = <1>;
1048c2ecf20Sopenharmony_ci		#size-cells = <1>;
1058c2ecf20Sopenharmony_ci		ranges;
1068c2ecf20Sopenharmony_ci		vdd10-supply = <&ldo11_reg>;
1078c2ecf20Sopenharmony_ci		vdd33-supply = <&ldo9_reg>;
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci		dwc3 {
1108c2ecf20Sopenharmony_ci			compatible = "synopsys,dwc3";
1118c2ecf20Sopenharmony_ci			reg = <0x12000000 0x10000>;
1128c2ecf20Sopenharmony_ci			interrupts = <0 72 0>;
1138c2ecf20Sopenharmony_ci			usb-phy = <&usb2_phy &usb3_phy>;
1148c2ecf20Sopenharmony_ci		};
1158c2ecf20Sopenharmony_ci	};
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