18c2ecf20Sopenharmony_ciBroadcom USB Device Controller (BDC) 28c2ecf20Sopenharmony_ci==================================== 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciRequired properties: 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci- compatible: must be one of: 78c2ecf20Sopenharmony_ci "brcm,bdc-udc-v2" 88c2ecf20Sopenharmony_ci "brcm,bdc" 98c2ecf20Sopenharmony_ci- reg: the base register address and length 108c2ecf20Sopenharmony_ci- interrupts: the interrupt line for this controller 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciOptional properties: 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciOn Broadcom STB platforms, these properties are required: 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci- phys: phandle to one or two USB PHY blocks 178c2ecf20Sopenharmony_ci NOTE: Some SoC's have a single phy and some have 188c2ecf20Sopenharmony_ci USB 2.0 and USB 3.0 phys 198c2ecf20Sopenharmony_ci- clocks: phandle to the functional clock of this block 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciExample: 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci bdc@f0b02000 { 248c2ecf20Sopenharmony_ci compatible = "brcm,bdc-udc-v2"; 258c2ecf20Sopenharmony_ci reg = <0xf0b02000 0xfc4>; 268c2ecf20Sopenharmony_ci interrupts = <0x0 0x60 0x0>; 278c2ecf20Sopenharmony_ci phys = <&usbphy_0 0x0>; 288c2ecf20Sopenharmony_ci clocks = <&sw_usbd>; 298c2ecf20Sopenharmony_ci }; 30