18c2ecf20Sopenharmony_ci* Universal Flash Storage (UFS) DesignWare Host Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciDWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY. 48c2ecf20Sopenharmony_ciEach UFS controller instance should have its own node. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci- compatible : compatible list must contain the PHY type & version: 88c2ecf20Sopenharmony_ci "snps,g210-tc-6.00-20bit" 98c2ecf20Sopenharmony_ci "snps,g210-tc-6.00-40bit" 108c2ecf20Sopenharmony_ci complemented with the Controller IP version: 118c2ecf20Sopenharmony_ci "snps,dwc-ufshcd-1.40a" 128c2ecf20Sopenharmony_ci complemented with the JEDEC version: 138c2ecf20Sopenharmony_ci "jedec,ufs-1.1" 148c2ecf20Sopenharmony_ci "jedec,ufs-2.0" 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci- reg : <registers mapping> 178c2ecf20Sopenharmony_ci- interrupts : <interrupt mapping for UFS host controller IRQ> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciExample for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC: 208c2ecf20Sopenharmony_ci dwc-ufs@d0000000 { 218c2ecf20Sopenharmony_ci compatible = "snps,g210-tc-6.00-40bit", 228c2ecf20Sopenharmony_ci "snps,dwc-ufshcd-1.40a", 238c2ecf20Sopenharmony_ci "jedec,ufs-2.0"; 248c2ecf20Sopenharmony_ci reg = < 0xd0000000 0x10000 >; 258c2ecf20Sopenharmony_ci interrupts = < 24 >; 268c2ecf20Sopenharmony_ci }; 27