18c2ecf20Sopenharmony_ci* MSM Timer
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciProperties:
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci- compatible : Should at least contain "qcom,msm-timer". More specific
68c2ecf20Sopenharmony_ci               properties specify which subsystem the timers are paired with.
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci               "qcom,kpss-timer" - krait subsystem
98c2ecf20Sopenharmony_ci               "qcom,scss-timer" - scorpion subsystem
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci- interrupts : Interrupts for the debug timer, the first general purpose
128c2ecf20Sopenharmony_ci               timer, and optionally a second general purpose timer, and
138c2ecf20Sopenharmony_ci               optionally as well, 2 watchdog interrupts, in that order.
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci- reg : Specifies the base address of the timer registers.
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci- clocks: Reference to the parent clocks, one per output clock. The parents
188c2ecf20Sopenharmony_ci          must appear in the same order as the clock names.
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci- clock-names: The name of the clocks as free-form strings. They should be in
218c2ecf20Sopenharmony_ci               the same order as the clocks.
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci- clock-frequency : The frequency of the debug timer and the general purpose
248c2ecf20Sopenharmony_ci                    timer(s) in Hz in that order.
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ciOptional:
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci- cpu-offset : per-cpu offset used when the timer is accessed without the
298c2ecf20Sopenharmony_ci               CPU remapping facilities. The offset is
308c2ecf20Sopenharmony_ci               cpu-offset + (0x10000 * cpu-nr).
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ciExample:
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci       timer@200a000 {
358c2ecf20Sopenharmony_ci               compatible = "qcom,scss-timer", "qcom,msm-timer";
368c2ecf20Sopenharmony_ci               interrupts = <1 1 0x301>,
378c2ecf20Sopenharmony_ci                            <1 2 0x301>,
388c2ecf20Sopenharmony_ci                            <1 3 0x301>,
398c2ecf20Sopenharmony_ci                            <1 4 0x301>,
408c2ecf20Sopenharmony_ci                            <1 5 0x301>;
418c2ecf20Sopenharmony_ci               reg = <0x0200a000 0x100>;
428c2ecf20Sopenharmony_ci               clock-frequency = <19200000>,
438c2ecf20Sopenharmony_ci                                 <32768>;
448c2ecf20Sopenharmony_ci               clocks = <&sleep_clk>;
458c2ecf20Sopenharmony_ci               clock-names = "sleep";
468c2ecf20Sopenharmony_ci               cpu-offset = <0x40000>;
478c2ecf20Sopenharmony_ci       };
48