18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: NXP Low Power Timer/Pulse Width Modulation Module (TPM) 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Dong Aisheng <aisheng.dong@nxp.com> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_cidescription: | 138c2ecf20Sopenharmony_ci The Timer/PWM Module (TPM) supports input capture, output compare, 148c2ecf20Sopenharmony_ci and the generation of PWM signals to control electric motor and power 158c2ecf20Sopenharmony_ci management applications. The counter, compare and capture registers 168c2ecf20Sopenharmony_ci are clocked by an asynchronous clock that can remain enabled in low 178c2ecf20Sopenharmony_ci power modes. TPM can support global counter bus where one TPM drives 188c2ecf20Sopenharmony_ci the counter bus for the others, provided bit width is the same. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciproperties: 218c2ecf20Sopenharmony_ci compatible: 228c2ecf20Sopenharmony_ci const: fsl,imx7ulp-tpm 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci reg: 258c2ecf20Sopenharmony_ci maxItems: 1 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci interrupts: 288c2ecf20Sopenharmony_ci maxItems: 1 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci clocks: 318c2ecf20Sopenharmony_ci items: 328c2ecf20Sopenharmony_ci - description: SoC TPM ipg clock 338c2ecf20Sopenharmony_ci - description: SoC TPM per clock 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci clock-names: 368c2ecf20Sopenharmony_ci items: 378c2ecf20Sopenharmony_ci - const: ipg 388c2ecf20Sopenharmony_ci - const: per 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_cirequired: 418c2ecf20Sopenharmony_ci - compatible 428c2ecf20Sopenharmony_ci - reg 438c2ecf20Sopenharmony_ci - interrupts 448c2ecf20Sopenharmony_ci - clocks 458c2ecf20Sopenharmony_ci - clock-names 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ciadditionalProperties: false 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ciexamples: 508c2ecf20Sopenharmony_ci - | 518c2ecf20Sopenharmony_ci #include <dt-bindings/clock/imx7ulp-clock.h> 528c2ecf20Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci timer@40260000 { 558c2ecf20Sopenharmony_ci compatible = "fsl,imx7ulp-tpm"; 568c2ecf20Sopenharmony_ci reg = <0x40260000 0x1000>; 578c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 588c2ecf20Sopenharmony_ci clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 598c2ecf20Sopenharmony_ci <&pcc2 IMX7ULP_CLK_LPTPM5>; 608c2ecf20Sopenharmony_ci clock-names = "ipg", "per"; 618c2ecf20Sopenharmony_ci }; 62