18c2ecf20Sopenharmony_ciNVIDIA Tegra20 timer 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe Tegra20 timer provides four 29-bit timer channels and a single 32-bit free 48c2ecf20Sopenharmony_cirunning counter. The first two channels may also trigger a watchdog reset. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci- compatible : should be "nvidia,tegra20-timer". 98c2ecf20Sopenharmony_ci- reg : Specifies base physical address and size of the registers. 108c2ecf20Sopenharmony_ci- interrupts : A list of 4 interrupts; one per timer channel. 118c2ecf20Sopenharmony_ci- clocks : Must contain one entry, for the module clock. 128c2ecf20Sopenharmony_ci See ../clocks/clock-bindings.txt for details. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciExample: 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_citimer { 178c2ecf20Sopenharmony_ci compatible = "nvidia,tegra20-timer"; 188c2ecf20Sopenharmony_ci reg = <0x60005000 0x60>; 198c2ecf20Sopenharmony_ci interrupts = <0 0 0x04 208c2ecf20Sopenharmony_ci 0 1 0x04 218c2ecf20Sopenharmony_ci 0 41 0x04 228c2ecf20Sopenharmony_ci 0 42 0x04>; 238c2ecf20Sopenharmony_ci clocks = <&tegra_car 132>; 248c2ecf20Sopenharmony_ci}; 25