18c2ecf20Sopenharmony_ciTegra124 SOCTHERM thermal management system
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThe SOCTHERM IP block contains thermal sensors, support for polled
48c2ecf20Sopenharmony_cior interrupt-based thermal monitoring, CPU and GPU throttling based
58c2ecf20Sopenharmony_cion temperature trip points, and handling external overcurrent
68c2ecf20Sopenharmony_cinotifications. It is also used to manage emergency shutdown in an
78c2ecf20Sopenharmony_cioverheating situation.
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ciRequired properties :
108c2ecf20Sopenharmony_ci- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
118c2ecf20Sopenharmony_ci  For Tegra132, must contain "nvidia,tegra132-soctherm".
128c2ecf20Sopenharmony_ci  For Tegra210, must contain "nvidia,tegra210-soctherm".
138c2ecf20Sopenharmony_ci- reg : Should contain at least 2 entries for each entry in reg-names:
148c2ecf20Sopenharmony_ci  - SOCTHERM register set
158c2ecf20Sopenharmony_ci  - Tegra CAR register set: Required for Tegra124 and Tegra210.
168c2ecf20Sopenharmony_ci  - CCROC register set: Required for Tegra132.
178c2ecf20Sopenharmony_ci- reg-names :  Should contain at least 2 entries:
188c2ecf20Sopenharmony_ci  - soctherm-reg
198c2ecf20Sopenharmony_ci  - car-reg
208c2ecf20Sopenharmony_ci  - ccroc-reg
218c2ecf20Sopenharmony_ci- interrupts : Defines the interrupt used by SOCTHERM
228c2ecf20Sopenharmony_ci- clocks : Must contain an entry for each entry in clock-names.
238c2ecf20Sopenharmony_ci  See ../clocks/clock-bindings.txt for details.
248c2ecf20Sopenharmony_ci- clock-names : Must include the following entries:
258c2ecf20Sopenharmony_ci  - tsensor
268c2ecf20Sopenharmony_ci  - soctherm
278c2ecf20Sopenharmony_ci- resets : Must contain an entry for each entry in reset-names.
288c2ecf20Sopenharmony_ci  See ../reset/reset.txt for details.
298c2ecf20Sopenharmony_ci- reset-names : Must include the following entries:
308c2ecf20Sopenharmony_ci  - soctherm
318c2ecf20Sopenharmony_ci- #thermal-sensor-cells : Should be 1. For a description of this property, see
328c2ecf20Sopenharmony_ci     Documentation/devicetree/bindings/thermal/thermal-sensor.yaml.
338c2ecf20Sopenharmony_ci    See <dt-bindings/thermal/tegra124-soctherm.h> for a list of valid values
348c2ecf20Sopenharmony_ci    when referring to thermal sensors.
358c2ecf20Sopenharmony_ci- throttle-cfgs: A sub-node which is a container of configuration for each
368c2ecf20Sopenharmony_ci    hardware throttle events. These events can be set as cooling devices.
378c2ecf20Sopenharmony_ci  * throttle events: Sub-nodes must be named as "light" or "heavy".
388c2ecf20Sopenharmony_ci      Properties:
398c2ecf20Sopenharmony_ci      - nvidia,priority: Each throttles has its own throttle settings, so the
408c2ecf20Sopenharmony_ci        SW need to set priorities for various throttle, the HW arbiter can select
418c2ecf20Sopenharmony_ci        the final throttle settings.
428c2ecf20Sopenharmony_ci        Bigger value indicates higher priority, In general, higher priority
438c2ecf20Sopenharmony_ci        translates to lower target frequency. SW needs to ensure that critical
448c2ecf20Sopenharmony_ci        thermal alarms are given higher priority, and ensure that there is
458c2ecf20Sopenharmony_ci        no race if priority of two vectors is set to the same value.
468c2ecf20Sopenharmony_ci        The range of this value is 1~100.
478c2ecf20Sopenharmony_ci      - nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210.
488c2ecf20Sopenharmony_ci        It is the throttling depth of pulse skippers, it's the percentage
498c2ecf20Sopenharmony_ci        throttling.
508c2ecf20Sopenharmony_ci      - nvidia,cpu-throt-level: This property is only for Tegra132, it is the
518c2ecf20Sopenharmony_ci        level of pulse skippers, which used to throttle clock frequencies. It
528c2ecf20Sopenharmony_ci        indicates cpu clock throttling depth, and the depth can be programmed.
538c2ecf20Sopenharmony_ci        Must set as following values:
548c2ecf20Sopenharmony_ci        TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
558c2ecf20Sopenharmony_ci        TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
568c2ecf20Sopenharmony_ci      - nvidia,gpu-throt-level: This property is for Tegra124 and Tegra210.
578c2ecf20Sopenharmony_ci        It is the level of pulse skippers, which used to throttle clock
588c2ecf20Sopenharmony_ci        frequencies. It indicates gpu clock throttling depth and can be
598c2ecf20Sopenharmony_ci        programmed to any of the following values which represent a throttling
608c2ecf20Sopenharmony_ci        percentage:
618c2ecf20Sopenharmony_ci        TEGRA_SOCTHERM_THROT_LEVEL_NONE (0%)
628c2ecf20Sopenharmony_ci        TEGRA_SOCTHERM_THROT_LEVEL_LOW (50%),
638c2ecf20Sopenharmony_ci        TEGRA_SOCTHERM_THROT_LEVEL_MED (75%),
648c2ecf20Sopenharmony_ci        TEGRA_SOCTHERM_THROT_LEVEL_HIGH (85%).
658c2ecf20Sopenharmony_ci      - #cooling-cells: Should be 1. This cooling device only support on/off state.
668c2ecf20Sopenharmony_ci        For a description of this property see:
678c2ecf20Sopenharmony_ci	Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci      Optional properties: The following properties are T210 specific and
708c2ecf20Sopenharmony_ci      valid only for OCx throttle events.
718c2ecf20Sopenharmony_ci      - nvidia,count-threshold: Specifies the number of OC events that are
728c2ecf20Sopenharmony_ci        required for triggering an interrupt. Interrupts are not triggered if
738c2ecf20Sopenharmony_ci        the property is missing. A value of 0 will interrupt on every OC alarm.
748c2ecf20Sopenharmony_ci      - nvidia,polarity-active-low: Configures the polarity of the OC alaram
758c2ecf20Sopenharmony_ci        signal. If present, this means assert low, otherwise assert high.
768c2ecf20Sopenharmony_ci      - nvidia,alarm-filter: Number of clocks to filter event. When the filter
778c2ecf20Sopenharmony_ci        expires (which means the OC event has not occurred for a long time),
788c2ecf20Sopenharmony_ci        the counter is cleared and filter is rearmed. Default value is 0.
798c2ecf20Sopenharmony_ci      - nvidia,throttle-period-us: Specifies the number of uSec for which
808c2ecf20Sopenharmony_ci        throttling is engaged after the OC event is deasserted. Default value
818c2ecf20Sopenharmony_ci        is 0.
828c2ecf20Sopenharmony_ci
838c2ecf20Sopenharmony_ciOptional properties:
848c2ecf20Sopenharmony_ci- nvidia,thermtrips : When present, this property specifies the temperature at
858c2ecf20Sopenharmony_ci  which the soctherm hardware will assert the thermal trigger signal to the
868c2ecf20Sopenharmony_ci  Power Management IC, which can be configured to reset or shutdown the device.
878c2ecf20Sopenharmony_ci  It is an array of pairs where each pair represents a tsensor id followed by a
888c2ecf20Sopenharmony_ci  temperature in milli Celcius. In the absence of this property the critical
898c2ecf20Sopenharmony_ci  trip point will be used for thermtrip temperature.
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ciNote:
928c2ecf20Sopenharmony_ci- the "critical" type trip points will be used to set the temperature at which
938c2ecf20Sopenharmony_cithe SOC_THERM hardware will assert a thermal trigger if the "nvidia,thermtrips"
948c2ecf20Sopenharmony_ciproperty is missing. When the thermtrips property is present, the breach of a
958c2ecf20Sopenharmony_cicritical trip point is reported back to the thermal framework to implement
968c2ecf20Sopenharmony_cisoftware shutdown.
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
998c2ecf20Sopenharmony_citemperature. Once the the temperature of this thermal zone is higher
1008c2ecf20Sopenharmony_cithan it, it will trigger the HW throttle event.
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ciExample :
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	soctherm@700e2000 {
1058c2ecf20Sopenharmony_ci		compatible = "nvidia,tegra124-soctherm";
1068c2ecf20Sopenharmony_ci		reg = <0x0 0x700e2000 0x0 0x600  /* SOC_THERM reg_base */
1078c2ecf20Sopenharmony_ci			0x0 0x60006000 0x0 0x400 /* CAR reg_base */
1088c2ecf20Sopenharmony_ci		reg-names = "soctherm-reg", "car-reg";
1098c2ecf20Sopenharmony_ci		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1108c2ecf20Sopenharmony_ci		clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
1118c2ecf20Sopenharmony_ci			<&tegra_car TEGRA124_CLK_SOC_THERM>;
1128c2ecf20Sopenharmony_ci		clock-names = "tsensor", "soctherm";
1138c2ecf20Sopenharmony_ci		resets = <&tegra_car 78>;
1148c2ecf20Sopenharmony_ci		reset-names = "soctherm";
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ci		#thermal-sensor-cells = <1>;
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci		nvidia,thermtrips = <TEGRA124_SOCTHERM_SENSOR_CPU 102500
1198c2ecf20Sopenharmony_ci				     TEGRA124_SOCTHERM_SENSOR_GPU 103000>;
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci		throttle-cfgs {
1228c2ecf20Sopenharmony_ci			/*
1238c2ecf20Sopenharmony_ci			 * When the "heavy" cooling device triggered,
1248c2ecf20Sopenharmony_ci			 * the HW will skip cpu clock's pulse in 85% depth,
1258c2ecf20Sopenharmony_ci			 * skip gpu clock's pulse in 85% level
1268c2ecf20Sopenharmony_ci			 */
1278c2ecf20Sopenharmony_ci			throttle_heavy: heavy {
1288c2ecf20Sopenharmony_ci				nvidia,priority = <100>;
1298c2ecf20Sopenharmony_ci				nvidia,cpu-throt-percent = <85>;
1308c2ecf20Sopenharmony_ci				nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ci				#cooling-cells = <1>;
1338c2ecf20Sopenharmony_ci			};
1348c2ecf20Sopenharmony_ci
1358c2ecf20Sopenharmony_ci			/*
1368c2ecf20Sopenharmony_ci			 * When the "light" cooling device triggered,
1378c2ecf20Sopenharmony_ci			 * the HW will skip cpu clock's pulse in 50% depth,
1388c2ecf20Sopenharmony_ci			 * skip gpu clock's pulse in 50% level
1398c2ecf20Sopenharmony_ci			 */
1408c2ecf20Sopenharmony_ci			throttle_light: light {
1418c2ecf20Sopenharmony_ci				nvidia,priority = <80>;
1428c2ecf20Sopenharmony_ci				nvidia,cpu-throt-percent = <50>;
1438c2ecf20Sopenharmony_ci				nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_LOW>;
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci				#cooling-cells = <1>;
1468c2ecf20Sopenharmony_ci			};
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci			/*
1498c2ecf20Sopenharmony_ci			 * If these two devices are triggered in same time, the HW throttle
1508c2ecf20Sopenharmony_ci			 * arbiter will select the highest priority as the final throttle
1518c2ecf20Sopenharmony_ci			 * settings to skip cpu pulse.
1528c2ecf20Sopenharmony_ci			 */
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ci			throttle_oc1: oc1 {
1558c2ecf20Sopenharmony_ci				nvidia,priority = <50>;
1568c2ecf20Sopenharmony_ci				nvidia,polarity-active-low;
1578c2ecf20Sopenharmony_ci				nvidia,count-threshold = <100>;
1588c2ecf20Sopenharmony_ci				nvidia,alarm-filter = <5100000>;
1598c2ecf20Sopenharmony_ci				nvidia,throttle-period-us = <0>;
1608c2ecf20Sopenharmony_ci				nvidia,cpu-throt-percent = <75>;
1618c2ecf20Sopenharmony_ci				nvidia,gpu-throt-level =
1628c2ecf20Sopenharmony_ci						<TEGRA_SOCTHERM_THROT_LEVEL_MED>;
1638c2ecf20Sopenharmony_ci                        };
1648c2ecf20Sopenharmony_ci		};
1658c2ecf20Sopenharmony_ci	};
1668c2ecf20Sopenharmony_ci
1678c2ecf20Sopenharmony_ciExample: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_ci	soctherm@700e2000 {
1708c2ecf20Sopenharmony_ci		compatible = "nvidia,tegra132-soctherm";
1718c2ecf20Sopenharmony_ci		reg = <0x0 0x700e2000 0x0 0x600  /* SOC_THERM reg_base */
1728c2ecf20Sopenharmony_ci			0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;
1738c2ecf20Sopenharmony_ci		reg-names = "soctherm-reg", "ccroc-reg";
1748c2ecf20Sopenharmony_ci
1758c2ecf20Sopenharmony_ci		throttle-cfgs {
1768c2ecf20Sopenharmony_ci			/*
1778c2ecf20Sopenharmony_ci			 * When the "heavy" cooling device triggered,
1788c2ecf20Sopenharmony_ci			 * the HW will skip cpu clock's pulse in HIGH level
1798c2ecf20Sopenharmony_ci			 */
1808c2ecf20Sopenharmony_ci			throttle_heavy: heavy {
1818c2ecf20Sopenharmony_ci				nvidia,priority = <100>;
1828c2ecf20Sopenharmony_ci				nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
1838c2ecf20Sopenharmony_ci
1848c2ecf20Sopenharmony_ci				#cooling-cells = <1>;
1858c2ecf20Sopenharmony_ci			};
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci			/*
1888c2ecf20Sopenharmony_ci			 * When the "light" cooling device triggered,
1898c2ecf20Sopenharmony_ci			 * the HW will skip cpu clock's pulse in MED level
1908c2ecf20Sopenharmony_ci			 */
1918c2ecf20Sopenharmony_ci			throttle_light: light {
1928c2ecf20Sopenharmony_ci				nvidia,priority = <80>;
1938c2ecf20Sopenharmony_ci				nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
1948c2ecf20Sopenharmony_ci
1958c2ecf20Sopenharmony_ci				#cooling-cells = <1>;
1968c2ecf20Sopenharmony_ci			};
1978c2ecf20Sopenharmony_ci
1988c2ecf20Sopenharmony_ci			/*
1998c2ecf20Sopenharmony_ci			 * If these two devices are triggered in same time, the HW throttle
2008c2ecf20Sopenharmony_ci			 * arbiter will select the highest priority as the final throttle
2018c2ecf20Sopenharmony_ci			 * settings to skip cpu pulse.
2028c2ecf20Sopenharmony_ci			 */
2038c2ecf20Sopenharmony_ci
2048c2ecf20Sopenharmony_ci		};
2058c2ecf20Sopenharmony_ci	};
2068c2ecf20Sopenharmony_ci
2078c2ecf20Sopenharmony_ciExample: referring to thermal sensors :
2088c2ecf20Sopenharmony_ci
2098c2ecf20Sopenharmony_ci       thermal-zones {
2108c2ecf20Sopenharmony_ci                cpu {
2118c2ecf20Sopenharmony_ci                        polling-delay-passive = <1000>;
2128c2ecf20Sopenharmony_ci                        polling-delay = <1000>;
2138c2ecf20Sopenharmony_ci
2148c2ecf20Sopenharmony_ci                        thermal-sensors =
2158c2ecf20Sopenharmony_ci                                <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
2168c2ecf20Sopenharmony_ci
2178c2ecf20Sopenharmony_ci			trips {
2188c2ecf20Sopenharmony_ci				cpu_shutdown_trip: shutdown-trip {
2198c2ecf20Sopenharmony_ci					temperature = <102500>;
2208c2ecf20Sopenharmony_ci					hysteresis = <1000>;
2218c2ecf20Sopenharmony_ci					type = "critical";
2228c2ecf20Sopenharmony_ci				};
2238c2ecf20Sopenharmony_ci
2248c2ecf20Sopenharmony_ci				cpu_throttle_trip: throttle-trip {
2258c2ecf20Sopenharmony_ci					temperature = <100000>;
2268c2ecf20Sopenharmony_ci					hysteresis = <1000>;
2278c2ecf20Sopenharmony_ci					type = "hot";
2288c2ecf20Sopenharmony_ci				};
2298c2ecf20Sopenharmony_ci			};
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_ci			cooling-maps {
2328c2ecf20Sopenharmony_ci				map0 {
2338c2ecf20Sopenharmony_ci					trip = <&cpu_throttle_trip>;
2348c2ecf20Sopenharmony_ci					cooling-device = <&throttle_heavy 1 1>;
2358c2ecf20Sopenharmony_ci				};
2368c2ecf20Sopenharmony_ci			};
2378c2ecf20Sopenharmony_ci                };
2388c2ecf20Sopenharmony_ci	};
239