18c2ecf20Sopenharmony_ciZTE TDM DAI driver 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci- compatible : should be one of the following. 68c2ecf20Sopenharmony_ci * zte,zx296718-tdm 78c2ecf20Sopenharmony_ci- reg : physical base address of the controller and length of memory mapped 88c2ecf20Sopenharmony_ci region. 98c2ecf20Sopenharmony_ci- clocks : Pairs of phandle and specifier referencing the controller's clocks. 108c2ecf20Sopenharmony_ci- clock-names: "wclk" for the wclk. 118c2ecf20Sopenharmony_ci "pclk" for the pclk. 128c2ecf20Sopenharmony_ci-#clock-cells: should be 1. 138c2ecf20Sopenharmony_ci- zte,tdm-dma-sysctrl : Reference to the sysctrl controller controlling 148c2ecf20Sopenharmony_ci the dma. includes: 158c2ecf20Sopenharmony_ci phandle of sysctrl. 168c2ecf20Sopenharmony_ci register offset in sysctrl for control dma. 178c2ecf20Sopenharmony_ci mask of the register that be written to sysctrl. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciExample: 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci tdm: tdm@1487000 { 228c2ecf20Sopenharmony_ci compatible = "zte,zx296718-tdm"; 238c2ecf20Sopenharmony_ci reg = <0x01487000 0x1000>; 248c2ecf20Sopenharmony_ci clocks = <&audiocrm AUDIO_TDM_WCLK>, <&audiocrm AUDIO_TDM_PCLK>; 258c2ecf20Sopenharmony_ci clock-names = "wclk", "pclk"; 268c2ecf20Sopenharmony_ci #clock-cells = <1>; 278c2ecf20Sopenharmony_ci pinctrl-names = "default"; 288c2ecf20Sopenharmony_ci pinctrl-0 = <&tdm_global_pin>; 298c2ecf20Sopenharmony_ci zte,tdm-dma-sysctrl = <&sysctrl 0x10c 4>; 308c2ecf20Sopenharmony_ci }; 31