18c2ecf20Sopenharmony_ciDevice-Tree bindings for Xilinx I2S PL block 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe IP supports I2S based playback/capture audio 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciRequired property: 68c2ecf20Sopenharmony_ci - compatible: "xlnx,i2s-transmitter-1.0" for playback and 78c2ecf20Sopenharmony_ci "xlnx,i2s-receiver-1.0" for capture 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciRequired property common to both I2S playback and capture: 108c2ecf20Sopenharmony_ci - reg: Base address and size of the IP core instance. 118c2ecf20Sopenharmony_ci - xlnx,dwidth: sample data width. Can be any of 16, 24. 128c2ecf20Sopenharmony_ci - xlnx,num-channels: Number of I2S streams. Can be any of 1, 2, 3, 4. 138c2ecf20Sopenharmony_ci supported channels = 2 * xlnx,num-channels 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciExample: 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci i2s_receiver@a0080000 { 188c2ecf20Sopenharmony_ci compatible = "xlnx,i2s-receiver-1.0"; 198c2ecf20Sopenharmony_ci reg = <0x0 0xa0080000 0x0 0x10000>; 208c2ecf20Sopenharmony_ci xlnx,dwidth = <0x18>; 218c2ecf20Sopenharmony_ci xlnx,num-channels = <1>; 228c2ecf20Sopenharmony_ci }; 238c2ecf20Sopenharmony_ci i2s_transmitter@a0090000 { 248c2ecf20Sopenharmony_ci compatible = "xlnx,i2s-transmitter-1.0"; 258c2ecf20Sopenharmony_ci reg = <0x0 0xa0090000 0x0 0x10000>; 268c2ecf20Sopenharmony_ci xlnx,dwidth = <0x18>; 278c2ecf20Sopenharmony_ci xlnx,num-channels = <1>; 288c2ecf20Sopenharmony_ci }; 29