18c2ecf20Sopenharmony_ciWM8903 audio CODEC 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThis device supports I2C only. 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciRequired properties: 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci - compatible : "wlf,wm8903" 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci - reg : the I2C address of the device. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci - gpio-controller : Indicates this device is a GPIO controller. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci - #gpio-cells : Should be two. The first cell is the pin number and the 148c2ecf20Sopenharmony_ci second cell is used to specify optional parameters (currently unused). 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciOptional properties: 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci - interrupts : The interrupt line the codec is connected to. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci - micdet-cfg : Default register value for R6 (Mic Bias). If absent, the 218c2ecf20Sopenharmony_ci default is 0. 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci - micdet-delay : The debounce delay for microphone detection in mS. If 248c2ecf20Sopenharmony_ci absent, the default is 100. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci - gpio-cfg : A list of GPIO configuration register values. The list must 278c2ecf20Sopenharmony_ci be 5 entries long. If absent, no configuration of these registers is 288c2ecf20Sopenharmony_ci performed. If any entry has the value 0xffffffff, that GPIO's 298c2ecf20Sopenharmony_ci configuration will not be modified. 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci - AVDD-supply : Analog power supply regulator on the AVDD pin. 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci - CPVDD-supply : Charge pump supply regulator on the CPVDD pin. 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci - DBVDD-supply : Digital buffer supply regulator for the DBVDD pin. 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci - DCVDD-supply : Digital core supply regulator for the DCVDD pin. 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ciPins on the device (for linking into audio routes): 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci * IN1L 428c2ecf20Sopenharmony_ci * IN1R 438c2ecf20Sopenharmony_ci * IN2L 448c2ecf20Sopenharmony_ci * IN2R 458c2ecf20Sopenharmony_ci * IN3L 468c2ecf20Sopenharmony_ci * IN3R 478c2ecf20Sopenharmony_ci * DMICDAT 488c2ecf20Sopenharmony_ci * HPOUTL 498c2ecf20Sopenharmony_ci * HPOUTR 508c2ecf20Sopenharmony_ci * LINEOUTL 518c2ecf20Sopenharmony_ci * LINEOUTR 528c2ecf20Sopenharmony_ci * LOP 538c2ecf20Sopenharmony_ci * LON 548c2ecf20Sopenharmony_ci * ROP 558c2ecf20Sopenharmony_ci * RON 568c2ecf20Sopenharmony_ci * MICBIAS 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ciExample: 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ciwm8903: codec@1a { 618c2ecf20Sopenharmony_ci compatible = "wlf,wm8903"; 628c2ecf20Sopenharmony_ci reg = <0x1a>; 638c2ecf20Sopenharmony_ci interrupts = < 347 >; 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci AVDD-supply = <&fooreg_a>; 668c2ecf20Sopenharmony_ci CPVDD-supply = <&fooreg_b>; 678c2ecf20Sopenharmony_ci DBVDD-supply = <&fooreg_c>; 688c2ecf20Sopenharmony_ci DCVDC-supply = <&fooreg_d>; 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci gpio-controller; 718c2ecf20Sopenharmony_ci #gpio-cells = <2>; 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci micdet-cfg = <0>; 748c2ecf20Sopenharmony_ci micdet-delay = <100>; 758c2ecf20Sopenharmony_ci gpio-cfg = < 768c2ecf20Sopenharmony_ci 0x0600 /* DMIC_LR, output */ 778c2ecf20Sopenharmony_ci 0x0680 /* DMIC_DAT, input */ 788c2ecf20Sopenharmony_ci 0x0000 /* GPIO, output, low */ 798c2ecf20Sopenharmony_ci 0x0200 /* Interrupt, output */ 808c2ecf20Sopenharmony_ci 0x01a0 /* BCLK, input, active high */ 818c2ecf20Sopenharmony_ci >; 828c2ecf20Sopenharmony_ci}; 83