18c2ecf20Sopenharmony_ciSTMicroelectronics STM32 Serial Audio Interface (SAI). 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe SAI interface (Serial Audio Interface) offers a wide set of audio protocols 48c2ecf20Sopenharmony_cias I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97. 58c2ecf20Sopenharmony_ciThe SAI contains two independent audio sub-blocks. Each sub-block has 68c2ecf20Sopenharmony_ciits own clock generator and I/O lines controller. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired properties: 98c2ecf20Sopenharmony_ci - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai" 108c2ecf20Sopenharmony_ci - reg: Base address and size of SAI common register set. 118c2ecf20Sopenharmony_ci - clocks: Must contain phandle and clock specifier pairs for each entry 128c2ecf20Sopenharmony_ci in clock-names. 138c2ecf20Sopenharmony_ci - clock-names: Must contain "pclk" "x8k" and "x11k" 148c2ecf20Sopenharmony_ci "pclk": Clock which feeds the peripheral bus interface. 158c2ecf20Sopenharmony_ci Mandatory for "st,stm32h7-sai" compatible. 168c2ecf20Sopenharmony_ci Not used for "st,stm32f4-sai" compatible. 178c2ecf20Sopenharmony_ci "x8k": SAI parent clock for sampling rates multiple of 8kHz. 188c2ecf20Sopenharmony_ci "x11k": SAI parent clock for sampling rates multiple of 11.025kHz. 198c2ecf20Sopenharmony_ci - interrupts: cpu DAI interrupt line shared by SAI sub-blocks 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciOptional properties: 228c2ecf20Sopenharmony_ci - resets: Reference to a reset controller asserting the SAI 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciSAI subnodes: 258c2ecf20Sopenharmony_ciTwo subnodes corresponding to SAI sub-block instances A et B can be defined. 268c2ecf20Sopenharmony_ciSubnode can be omitted for unsused sub-block. 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ciSAI subnodes required properties: 298c2ecf20Sopenharmony_ci - compatible: Should be "st,stm32-sai-sub-a" or "st,stm32-sai-sub-b" 308c2ecf20Sopenharmony_ci for SAI sub-block A or B respectively. 318c2ecf20Sopenharmony_ci - reg: Base address and size of SAI sub-block register set. 328c2ecf20Sopenharmony_ci - clocks: Must contain one phandle and clock specifier pair 338c2ecf20Sopenharmony_ci for sai_ck which feeds the internal clock generator. 348c2ecf20Sopenharmony_ci If the SAI shares a master clock, with another SAI set as MCLK 358c2ecf20Sopenharmony_ci clock provider, SAI provider phandle must be specified here. 368c2ecf20Sopenharmony_ci - clock-names: Must contain "sai_ck". 378c2ecf20Sopenharmony_ci Must also contain "MCLK", if SAI shares a master clock, 388c2ecf20Sopenharmony_ci with a SAI set as MCLK clock provider. 398c2ecf20Sopenharmony_ci - dmas: see Documentation/devicetree/bindings/dma/st,stm32-dma.yaml 408c2ecf20Sopenharmony_ci - dma-names: identifier string for each DMA request line 418c2ecf20Sopenharmony_ci "tx": if sai sub-block is configured as playback DAI 428c2ecf20Sopenharmony_ci "rx": if sai sub-block is configured as capture DAI 438c2ecf20Sopenharmony_ci - pinctrl-names: should contain only value "default" 448c2ecf20Sopenharmony_ci - pinctrl-0: see Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ciSAI subnodes Optional properties: 478c2ecf20Sopenharmony_ci - st,sync: specify synchronization mode. 488c2ecf20Sopenharmony_ci By default SAI sub-block is in asynchronous mode. 498c2ecf20Sopenharmony_ci This property sets SAI sub-block as slave of another SAI sub-block. 508c2ecf20Sopenharmony_ci Must contain the phandle and index of the sai sub-block providing 518c2ecf20Sopenharmony_ci the synchronization. 528c2ecf20Sopenharmony_ci - st,iec60958: support S/PDIF IEC6958 protocol for playback 538c2ecf20Sopenharmony_ci IEC60958 protocol is not available for capture. 548c2ecf20Sopenharmony_ci By default, custom protocol is assumed, meaning that protocol is 558c2ecf20Sopenharmony_ci configured according to protocol defined in related DAI link node, 568c2ecf20Sopenharmony_ci such as i2s, left justified, right justified, dsp and pdm protocols. 578c2ecf20Sopenharmony_ci Note: ac97 protocol is not supported by SAI driver 588c2ecf20Sopenharmony_ci - #clock-cells: should be 0. This property must be present if the SAI device 598c2ecf20Sopenharmony_ci is a master clock provider, according to clocks bindings, described in 608c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/clock/clock-bindings.txt. 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ciThe device node should contain one 'port' child node with one child 'endpoint' 638c2ecf20Sopenharmony_cinode, according to the bindings defined in Documentation/devicetree/bindings/ 648c2ecf20Sopenharmony_cigraph.txt. 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ciExample: 678c2ecf20Sopenharmony_cisound_card { 688c2ecf20Sopenharmony_ci compatible = "audio-graph-card"; 698c2ecf20Sopenharmony_ci dais = <&sai1b_port>; 708c2ecf20Sopenharmony_ci}; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_cisai1: sai1@40015800 { 738c2ecf20Sopenharmony_ci compatible = "st,stm32h7-sai"; 748c2ecf20Sopenharmony_ci #address-cells = <1>; 758c2ecf20Sopenharmony_ci #size-cells = <1>; 768c2ecf20Sopenharmony_ci ranges = <0 0x40015800 0x400>; 778c2ecf20Sopenharmony_ci reg = <0x40015800 0x4>; 788c2ecf20Sopenharmony_ci clocks = <&rcc SAI1_CK>, <&rcc PLL1_Q>, <&rcc PLL2_P>; 798c2ecf20Sopenharmony_ci clock-names = "pclk", "x8k", "x11k"; 808c2ecf20Sopenharmony_ci interrupts = <87>; 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci sai1a: audio-controller@40015804 { 838c2ecf20Sopenharmony_ci compatible = "st,stm32-sai-sub-a"; 848c2ecf20Sopenharmony_ci reg = <0x4 0x1C>; 858c2ecf20Sopenharmony_ci clocks = <&rcc SAI1_CK>; 868c2ecf20Sopenharmony_ci clock-names = "sai_ck"; 878c2ecf20Sopenharmony_ci dmas = <&dmamux1 1 87 0x400 0x0>; 888c2ecf20Sopenharmony_ci dma-names = "tx"; 898c2ecf20Sopenharmony_ci pinctrl-names = "default"; 908c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_sai1a>; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci sai1b_port: port { 938c2ecf20Sopenharmony_ci cpu_endpoint: endpoint { 948c2ecf20Sopenharmony_ci remote-endpoint = <&codec_endpoint>; 958c2ecf20Sopenharmony_ci format = "i2s"; 968c2ecf20Sopenharmony_ci }; 978c2ecf20Sopenharmony_ci }; 988c2ecf20Sopenharmony_ci }; 998c2ecf20Sopenharmony_ci}; 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ciaudio-codec { 1028c2ecf20Sopenharmony_ci codec_port: port { 1038c2ecf20Sopenharmony_ci codec_endpoint: endpoint { 1048c2ecf20Sopenharmony_ci remote-endpoint = <&cpu_endpoint>; 1058c2ecf20Sopenharmony_ci }; 1068c2ecf20Sopenharmony_ci }; 1078c2ecf20Sopenharmony_ci}; 108