18c2ecf20Sopenharmony_ci* SiRF SoC USP module 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible: "sirf,prima2-usp-pcm" 58c2ecf20Sopenharmony_ci- reg: Base address and size entries: 68c2ecf20Sopenharmony_ci- dmas: List of DMA controller phandle and DMA request line ordered pairs. 78c2ecf20Sopenharmony_ci- dma-names: Identifier string for each DMA request line in the dmas property. 88c2ecf20Sopenharmony_ci These strings correspond 1:1 with the ordered pairs in dmas. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci One of the DMA channels will be responsible for transmission (should be 118c2ecf20Sopenharmony_ci named "tx") and one for reception (should be named "rx"). 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci- clocks: USP controller clock source 148c2ecf20Sopenharmony_ci- pinctrl-names: Must contain a "default" entry. 158c2ecf20Sopenharmony_ci- pinctrl-NNN: One property must exist for each entry in pinctrl-names. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciExample: 188c2ecf20Sopenharmony_ciusp0: usp@b0080000 { 198c2ecf20Sopenharmony_ci compatible = "sirf,prima2-usp-pcm"; 208c2ecf20Sopenharmony_ci reg = <0xb0080000 0x10000>; 218c2ecf20Sopenharmony_ci clocks = <&clks 28>; 228c2ecf20Sopenharmony_ci dmas = <&dmac1 1>, <&dmac1 2>; 238c2ecf20Sopenharmony_ci dma-names = "rx", "tx"; 248c2ecf20Sopenharmony_ci pinctrl-names = "default"; 258c2ecf20Sopenharmony_ci pinctrl-0 = <&usp0_only_utfs_pins_a>; 268c2ecf20Sopenharmony_ci}; 278c2ecf20Sopenharmony_ci 28